diff options
Diffstat (limited to 'src/mainboard/tyan/s2880')
| -rw-r--r-- | src/mainboard/tyan/s2880/Kconfig | 123 | ||||
| -rw-r--r-- | src/mainboard/tyan/s2880/Makefile.inc | 70 |
2 files changed, 193 insertions, 0 deletions
diff --git a/src/mainboard/tyan/s2880/Kconfig b/src/mainboard/tyan/s2880/Kconfig new file mode 100644 index 0000000000..d66c2b7606 --- /dev/null +++ b/src/mainboard/tyan/s2880/Kconfig @@ -0,0 +1,123 @@ +config BOARD_TYAN_S2880 + bool "Thunder K8SR (S2880)" + select ARCH_X86 + select CPU_AMD_K8 + select CPU_AMD_SOCKET_940 + select NORTHBRIDGE_AMD_AMDK8 + select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX + select SOUTHBRIDGE_AMD_AMD8131 + select SOUTHBRIDGE_AMD_AMD8111 + select SUPERIO_WINBOND_W83627HF + select PIRQ_TABLE + select SERIAL_CPU_INIT + select AP_CODE_IN_CAR + +config MAINBOARD_DIR + string + default tyan/s2880 + depends on BOARD_TYAN_S2880 + +config APIC_ID_OFFSET + hex + default 0x10 + depends on BOARD_TYAN_S2880 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_TYAN_S2880 + +config LB_CKS_RANGE_END + int + default 122 + depends on BOARD_TYAN_S2880 + +config LB_CKS_LOC + int + default 123 + depends on BOARD_TYAN_S2880 + +config MAINBOARD_PART_NUMBER + string + default "s2880" + depends on BOARD_TYAN_S2880 + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x2880 + depends on BOARD_TYAN_S2880 + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_TYAN_S2880 + +config MEM_TRAIN_SEQ + bool + default n + depends on BOARD_TYAN_S2880 + +config MAX_CPUS + int + default 4 + depends on BOARD_TYAN_S2880 + +config MAX_PHYSICAL_CPUS + int + default 2 + depends on BOARD_TYAN_S2880 + +config MEM_TRAIN_SEQ + bool + default n + depends on BOARD_TYAN_S2880 + +config AP_CODE_IN_CAR + bool + default n + depends on BOARD_TYAN_S2880 + +config HW_MEM_HOLE_SIZE_AUTO_INC + bool + default n + depends on BOARD_TYAN_S2880 + +config HT_CHAIN_UNITID_BASE + hex + default 0xa + depends on BOARD_TYAN_S2880 + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x6 + depends on BOARD_TYAN_S2880 + +config USE_INIT + bool + default n + depends on BOARD_TYAN_S2880 + +config WAIT_BEFORE_CPUS_INIT + bool + default n + depends on BOARD_TYAN_S2880 + +config SB_HT_CHAIN_ON_BUS0 + int + default 0 + depends on BOARD_TYAN_S2880 + +config SB_HT_CHAIN_UNITID_OFFSET_ONLY + bool + default n + depends on BOARD_TYAN_S2880 + +config HAVE_ACPI_TABLES + bool "Generate ACPI tables" + default n + depends on BOARD_TYAN_S2880 + +config IRQ_SLOT_COUNT + int + default 9 + depends on BOARD_TYAN_S2880 diff --git a/src/mainboard/tyan/s2880/Makefile.inc b/src/mainboard/tyan/s2880/Makefile.inc new file mode 100644 index 0000000000..d6fcb7b33a --- /dev/null +++ b/src/mainboard/tyan/s2880/Makefile.inc @@ -0,0 +1,70 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007-2008 coresystems GmbH +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License as +## published by the Free Software Foundation; version 2 of +## the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +## MA 02110-1301 USA +## + +## +## This mainboard requires DCACHE_AS_RAM enabled. It won't work without. +## + +driver-y += mainboard.o + +#needed by irq_tables and mptable and acpi_tables +obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o +obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o +obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o +obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o + +#driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o + +# This is part of the conversion to init-obj and away from included code. + +initobj-y += crt0.o +# FIXME in $(top)/Makefile +crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc +crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc +crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc +crt0-y += ../../../../src/southbridge/nvidia/ck804/id.inc +crt0-y += ../../../../src/southbridge/nvidia/ck804/romstrap.inc +crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc +crt0-y += auto.inc + +ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb +ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds +ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds +ldscript-y += ../../../../src/southbridge/nvidia/ck804/id.lds +ldscript-y += ../../../../src/southbridge/nvidia/ck804/romstrap.lds +ldscript-y += ../../../../src/arch/i386/lib/failover.lds + +ifdef POST_EVALUATION + +$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl + iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl + mv dsdt.hex $@ + +$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@ + +$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@ + perl -e 's/\.rodata/.rom.data/g' -pi $@ + perl -e 's/\.text/.section .rom.text/g' -pi $@ + +endif + |