diff options
Diffstat (limited to 'src/mainboard/tyan/s2735/failover.c')
-rw-r--r-- | src/mainboard/tyan/s2735/failover.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/src/mainboard/tyan/s2735/failover.c b/src/mainboard/tyan/s2735/failover.c new file mode 100644 index 0000000000..6ba3cae62a --- /dev/null +++ b/src/mainboard/tyan/s2735/failover.c @@ -0,0 +1,59 @@ +#define ASSEMBLY 1 +#include <stdint.h> +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <arch/smp/lapic.h> +#include "pc80/mc146818rtc_early.c" +#include "southbridge/intel/i82801er/cmos_failover.c" +#include "cpu/p6/boot_cpu.c" +#include "northbridge/intel/e7501/reset_test.c" + +#define HAVE_REGPARM_SUPPORT 0 +#if HAVE_REGPARM_SUPPORT +static unsigned long main(unsigned long bist) +{ +#else +static void main(void) +{ + unsigned long bist = 0; + +#endif + /* Is this a deliberate reset by the bios */ + if (bios_reset_detected() && last_boot_normal()) { + goto normal_image; + } + /* This is the primary cpu how should I boot? */ + else { + + check_cmos_failed(); + + if (do_normal_boot()) { + goto normal_image; + } + else { + goto fallback_image; + } + } + normal_image: + asm volatile ("jmp __normal_image" + : /* outputs */ + : "a" (bist) /* inputs */ + : /* clobbers */ + ); +#if 0 + cpu_reset: + asm volatile ("jmp __cpu_reset" + : /* outputs */ + : "a"(bist) /* inputs */ + : /* clobbers */ + ); +#endif + fallback_image: +#if HAVE_REGPARM_SUPPORT + return bist; +#else + return; +#endif +} |