1 files changed, 0 insertions, 73 deletions
diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
deleted file mode 100644
index 1dba4a3716..0000000000
--- a/src/mainboard/traverse/geos/romstage.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <lib.h>
-#include <cpu/x86/bist.h>
-#include <cpu/x86/msr.h>
-#include <cpu/amd/lxdef.h>
-#include <southbridge/amd/cs5536/cs5536.h>
-#include <spd.h>
-#include <northbridge/amd/lx/raminit.h>
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-#include "northbridge/amd/lx/pll_reset.c"
-#include "cpu/amd/geode_lx/cpureginit.c"
-#include "cpu/amd/geode_lx/syspreinit.c"
-#include "cpu/amd/geode_lx/msrinit.c"
-
-void asmlinkage mainboard_romstage_entry(unsigned long bist)
-{
-	static const struct mem_controller memctrl[] = {
-		{.channel0 = {DIMM0, DIMM1}}
-	};
-
-	SystemPreInit();
-	msr_init();
-
-	cs5536_early_setup();
-
-	/* Note: must do this AFTER the early_setup! It is counting on some
-	 * early MSR setup for CS5536.
-	 */
-	/* cs5536_disable_internal_uart: disable them for now, set them
-	 * up later...
-	 */
-	/* If debug. real setup done in chipset init via devicetree.cb. */
-	cs5536_setup_onchipuart(1);
-	console_init();
-
-	/* Halt if there was a built in self test failure */
-	report_bist_failure(bist);
-
-	pll_reset();
-
-	cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
-
-	sdram_initialize(1, memctrl);
-
-	/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
-	return;
-}