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-rw-r--r--src/mainboard/thomson/ip1000/Config.lb144
-rw-r--r--src/mainboard/thomson/ip1000/Options.lb96
2 files changed, 0 insertions, 240 deletions
diff --git a/src/mainboard/thomson/ip1000/Config.lb b/src/mainboard/thomson/ip1000/Config.lb
deleted file mode 100644
index a509341c07..0000000000
--- a/src/mainboard/thomson/ip1000/Config.lb
+++ /dev/null
@@ -1,144 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-
-## CONFIG_XIP_ROM_SIZE must be a power of 2.
-default CONFIG_XIP_ROM_SIZE = 64 * 1024
-include /config/nofailovercalculation.lb
-
-arch i386 end
-driver mainboard.o
-if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
-if CONFIG_GENERATE_ACPI_TABLES
- object fadt.o
- object dsdt.o
- object acpi_tables.o
-end
-makerule ./failover.E
- depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
- action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
-end
-makerule ./failover.inc
- depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
- action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
-end
-makerule ./auto.E
- # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
- depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
- action "../romcc -E -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
-end
-makerule ./auto.inc
- # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
- depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
- action "../romcc -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
-end
-mainboardinit cpu/x86/16bit/entry16.inc
-mainboardinit cpu/x86/32bit/entry32.inc
-ldscript /cpu/x86/16bit/entry16.lds
-ldscript /cpu/x86/32bit/entry32.lds
-if CONFIG_USE_FALLBACK_IMAGE
- mainboardinit cpu/x86/16bit/reset16.inc
- ldscript /cpu/x86/16bit/reset16.lds
-else
- mainboardinit cpu/x86/32bit/reset32.inc
- ldscript /cpu/x86/32bit/reset32.lds
-end
-mainboardinit arch/i386/lib/cpu_reset.inc
-mainboardinit arch/i386/lib/id.inc
-ldscript /arch/i386/lib/id.lds
-if CONFIG_USE_FALLBACK_IMAGE
- ldscript /arch/i386/lib/failover.lds
- mainboardinit ./failover.inc
-end
-mainboardinit cpu/x86/fpu_enable.inc
-mainboardinit ./auto.inc
-mainboardinit cpu/x86/mmx_disable.inc
-dir /pc80
-config chip.h
-
-chip northbridge/intel/i82830 # Northbridge
- device pci_domain 0 on # PCI domain
- device pci 0.0 on end # Host bridge
- device pci 2.0 on end # VGA (Intel 82830 CGC)
- chip southbridge/intel/i82801xx # Southbridge
- register "pirqa_routing" = "0x05"
- register "pirqb_routing" = "0x06"
- register "pirqc_routing" = "0x07"
- register "pirqd_routing" = "0x09"
- register "pirqe_routing" = "0x0a"
- register "pirqf_routing" = "0x80"
- register "pirqg_routing" = "0x80"
- register "pirqh_routing" = "0x0b"
-
- register "ide0_enable" = "1"
- register "ide1_enable" = "1"
-
- device pci 1d.0 on end # USB UHCI Controller #1
- device pci 1d.1 on end # USB UHCI Controller #2
- device pci 1d.2 on end # USB UHCI Controller #3
- device pci 1d.7 on end # USB2 EHCI Controller
- device pci 1e.0 on # PCI bridge
- device pci 08.0 on end # Intel 82801DB PRO/100 VE Ethernet
- end
- device pci 1f.0 on # ISA/LPC bridge
- chip superio/smsc/smscsuperio # Super I/O
- device pnp 2e.0 off # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.3 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- drq 0x74 = 4
- end
- device pnp 2e.4 on # Com1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.5 on # Com2 / IR
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.7 on # PS/2 keyboard/mouse
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1 # Keyboard interrupt
- irq 0x72 = 12 # Mouse interrupt
- end
- device pnp 2e.9 off end # Game port
- device pnp 2e.a on # PME
- io 0x60 = 0x800
- end
- device pnp 2e.b off end # MPU-401
- end
- end
- device pci 1f.1 on end # IDE
- device pci 1f.3 on end # SMBus
- device pci 1f.5 on end # AC'97 audio
- device pci 1f.6 off end # AC'97 modem
- end
- end
- device apic_cluster 0 on # APIC cluster
- chip cpu/intel/socket_PGA370 # Low Voltage PIII Micro-FCBGA Socket 479
- device apic 0 on end # APIC
- end
- end
-end
-
diff --git a/src/mainboard/thomson/ip1000/Options.lb b/src/mainboard/thomson/ip1000/Options.lb
deleted file mode 100644
index 655d94fae7..0000000000
--- a/src/mainboard/thomson/ip1000/Options.lb
+++ /dev/null
@@ -1,96 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-
-uses CC
-uses CONFIG_CONSOLE_SERIAL8250
-uses CONFIG_CONSOLE_VGA
-uses CONFIG_COMPRESSED_PAYLOAD_LZMA
-uses CONFIG_IOAPIC
-uses CONFIG_PCI_OPTION_ROM_RUN_REALMODE
-uses CONFIG_PCI_ROM_RUN
-uses CONFIG_ROM_PAYLOAD
-uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
-uses CONFIG_UDELAY_TSC
-uses CONFIG_VIDEO_MB
-uses CONFIG_CROSS_COMPILE
-uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
-uses CONFIG_FALLBACK_SIZE
-uses CONFIG_GENERATE_ACPI_TABLES
-uses CONFIG_HAVE_ACPI_RESUME
-uses CONFIG_HAVE_FALLBACK_BOOT
-uses CONFIG_GENERATE_MP_TABLE
-uses CONFIG_HAVE_OPTION_TABLE
-uses CONFIG_GENERATE_PIRQ_TABLE
-uses CONFIG_HEAP_SIZE
-uses HOSTCC
-uses CONFIG_IRQ_SLOT_COUNT
-uses COREBOOT_EXTRA_VERSION
-uses CONFIG_MAINBOARD
-uses CONFIG_MAINBOARD_VENDOR
-uses CONFIG_MAINBOARD_PART_NUMBER
-uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
-uses CONFIG_OBJCOPY
-uses CONFIG_RAMBASE
-uses CONFIG_ROMBASE
-uses CONFIG_ROM_IMAGE_SIZE
-uses CONFIG_ROM_SECTION_SIZE
-uses CONFIG_ROM_SECTION_OFFSET
-uses CONFIG_ROM_SIZE
-uses CONFIG_STACK_SIZE
-uses CONFIG_TTYS0_BASE
-uses CONFIG_TTYS0_BAUD
-uses CONFIG_TTYS0_LCS
-uses CONFIG_USE_FALLBACK_IMAGE
-uses CONFIG_USE_OPTION_TABLE
-uses CONFIG_XIP_ROM_SIZE
-uses CONFIG_XIP_ROM_BASE
-
-default CONFIG_ROM_SIZE = 512 * 1024
-default CONFIG_ROM_IMAGE_SIZE = 128 * 1024
-default CONFIG_HAVE_FALLBACK_BOOT = 1
-default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
-default CONFIG_UDELAY_TSC = 1
-default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
-default CONFIG_GENERATE_PIRQ_TABLE = 1
-default CONFIG_IRQ_SLOT_COUNT = 7
-default CONFIG_GENERATE_MP_TABLE = 0
-default CONFIG_GENERATE_ACPI_TABLES = 0
-default CONFIG_IOAPIC = 0
-default CONFIG_HAVE_OPTION_TABLE = 0
-default CONFIG_CONSOLE_VGA = 0
-default CONFIG_PCI_ROM_RUN = 0
-default CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0
-default CONFIG_VIDEO_MB = 0
-default CONFIG_STACK_SIZE = 0x2000
-default CONFIG_HEAP_SIZE = 0x4000
-default CONFIG_RAMBASE = 0x00004000
-default CONFIG_USE_OPTION_TABLE = 0
-default CONFIG_ROM_PAYLOAD = 1
-default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
-default HOSTCC="gcc"
-default CONFIG_CONSOLE_SERIAL8250 = 1
-default CONFIG_TTYS0_BAUD = 115200
-default CONFIG_TTYS0_BASE = 0x3f8
-default CONFIG_TTYS0_LCS = 0x3 # 8n1
-default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
-default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
-default CONFIG_MAINBOARD_VENDOR = "THOMSON"
-default CONFIG_MAINBOARD_PART_NUMBER = "IP1000"
-end
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 15:30:08 +0000