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-rw-r--r--src/mainboard/technexion/Kconfig2
-rw-r--r--src/mainboard/technexion/tim5690/mainboard.c2
-rw-r--r--src/mainboard/technexion/tim5690/speaker.c2
-rw-r--r--src/mainboard/technexion/tim8690/mainboard.c2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/technexion/Kconfig b/src/mainboard/technexion/Kconfig
index c0bf041034..da13c340eb 100644
--- a/src/mainboard/technexion/Kconfig
+++ b/src/mainboard/technexion/Kconfig
@@ -1,7 +1,7 @@
choice
prompt "Mainboard model"
depends on VENDOR_TECHNEXION
-
+
source "src/mainboard/technexion/tim8690/Kconfig"
source "src/mainboard/technexion/tim5690/Kconfig"
diff --git a/src/mainboard/technexion/tim5690/mainboard.c b/src/mainboard/technexion/tim5690/mainboard.c
index 11bb4248e7..924d09e55f 100644
--- a/src/mainboard/technexion/tim5690/mainboard.c
+++ b/src/mainboard/technexion/tim5690/mainboard.c
@@ -184,7 +184,7 @@ static void mb_gpio_init(u16 *iobase)
it8712f_enter_conf();
outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX);
outb(IT8712F_GPIO, SIO_DATA);
- outb(0x62, SIO_INDEX);
+ outb(0x62, SIO_INDEX);
outb((*iobase >> 8), SIO_DATA);
outb(0x63, SIO_INDEX);
outb((*iobase & 0xff), SIO_DATA);
diff --git a/src/mainboard/technexion/tim5690/speaker.c b/src/mainboard/technexion/tim5690/speaker.c
index ae11b3eb63..b7f18647d3 100644
--- a/src/mainboard/technexion/tim5690/speaker.c
+++ b/src/mainboard/technexion/tim5690/speaker.c
@@ -54,7 +54,7 @@ void speaker_init(uint8_t time) {
* CounterSelect, bit[7:6]=10b, Select counter 2.
*/
outb(0xb6, 0x43);
-
+
/* SB600 RRG.
* TimerCh2- RW - 8 bits - [IO_Reg: 42h].
diff --git a/src/mainboard/technexion/tim8690/mainboard.c b/src/mainboard/technexion/tim8690/mainboard.c
index 294c0f2590..664372d879 100644
--- a/src/mainboard/technexion/tim8690/mainboard.c
+++ b/src/mainboard/technexion/tim8690/mainboard.c
@@ -48,7 +48,7 @@ uint64_t uma_memory_base, uma_memory_size;
/***************************************************
* This board, the TIM-8690 has two Marvel 88e5056 PCI-E
-* 10/100/1000 chips on board.
+* 10/100/1000 chips on board.
* Both of their pin PERSTn pins are connected to GPIO 5 of the
* SB600 southbridge.
****************************************************/