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-rw-r--r--src/mainboard/technexion/tim5690/romstage.c4
-rw-r--r--src/mainboard/technexion/tim8690/romstage.c4
2 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c
index 05ce74da3a..de86013b5d 100644
--- a/src/mainboard/technexion/tim5690/romstage.c
+++ b/src/mainboard/technexion/tim5690/romstage.c
@@ -20,9 +20,6 @@
#define RC0 (6<<8)
#define RC1 (7<<8)
-#define DIMM0 0x50
-#define DIMM1 0x51
-
#define SMBUS_HUB 0x71
#include <stdint.h>
@@ -39,6 +36,7 @@
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
+#include <spd.h>
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index 44c02fb0c8..c97cd6b4d3 100644
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -20,9 +20,6 @@
#define RC0 (6<<8)
#define RC1 (7<<8)
-#define DIMM0 0x50
-#define DIMM1 0x51
-
#define SMBUS_HUB 0x71
#include <stdint.h>
@@ -39,6 +36,7 @@
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
+#include <spd.h>
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"