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Diffstat (limited to 'src/mainboard/technexion/tim8690/Config.lb')
-rw-r--r--src/mainboard/technexion/tim8690/Config.lb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/technexion/tim8690/Config.lb b/src/mainboard/technexion/tim8690/Config.lb
index e69d01df60..a40bf65b7d 100644
--- a/src/mainboard/technexion/tim8690/Config.lb
+++ b/src/mainboard/technexion/tim8690/Config.lb
@@ -134,7 +134,6 @@ config chip.h
#The variables belong to mainboard are defined here.
#Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default)
-#Define vga_rom_address = 0xfff80000
#Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
#Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
@@ -158,7 +157,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 1.0 on # Internal Graphics P2P bridge 0x7912
chip drivers/pci/onboard
device pci 5.0 on end # Internal Graphics 0x791F
- register "rom_address" = "0xfff80000"
end
end
device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
@@ -168,7 +166,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 6.0 on end # PCIE P2P bridge 0x7916
device pci 7.0 on end # PCIE P2P bridge 0x7917
device pci 8.0 off end # NB/SB Link P2P bridge
- register "vga_rom_address" = "0xfff80000"
register "gpp_configuration" = "4"
register "port_enable" = "0xfc"
register "gfx_dev2_dev3" = "1"