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-rw-r--r--src/mainboard/system76/tgl-u/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/system76/tgl-u/devicetree.cb b/src/mainboard/system76/tgl-u/devicetree.cb
index d96249db51..94b5970165 100644
--- a/src/mainboard/system76/tgl-u/devicetree.cb
+++ b/src/mainboard/system76/tgl-u/devicetree.cb
@@ -15,7 +15,7 @@ chip soc/intel/tigerlake
register "eist_enable" = "true"
# Enable s0ix, required for TGL-U
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
# Enable C6 DRAM