diff options
Diffstat (limited to 'src/mainboard/system76/rpl/devicetree.cb')
| -rw-r--r-- | src/mainboard/system76/rpl/devicetree.cb | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/src/mainboard/system76/rpl/devicetree.cb b/src/mainboard/system76/rpl/devicetree.cb new file mode 100644 index 0000000000..0fed44d889 --- /dev/null +++ b/src/mainboard/system76/rpl/devicetree.cb @@ -0,0 +1,72 @@ +chip soc/intel/alderlake + register "common_soc_config" = "{ + // Touchpad I2C bus + .i2c[0] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 80, + .fall_time_ns = 110, + }, + }" + + # Enable Enhanced Intel SpeedStep + register "eist_enable" = "1" + + # Enable C6 DRAM + register "enable_c6dram" = "1" + + # Thermal + register "tcc_offset" = "8" + + device cpu_cluster 0 on end + + device domain 0 on + device ref system_agent on end + device ref igpu on + # DDIA is eDP, DDIB is HDMI + register "ddi_portA_config" = "1" + register "ddi_ports_config" = "{ + [DDI_PORT_A] = DDI_ENABLE_HPD, + [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, + }" + + register "gfx" = "GMA_DEFAULT_PANEL(0)" + end + device ref shared_sram on end + device ref cnvi_wifi on + register "cnvi_bt_core" = "true" + register "cnvi_bt_audio_offload" = "true" + chip drivers/wifi/generic + register "wake" = "GPE0_PME_B0" + device generic 0 on end + end + end + device ref i2c1 on + register "serial_io_i2c_mode[PchSerialIoIndexI2C1]" = "PchSerialIoPci" + end + + device ref heci1 on end + device ref sata on + register "sata_salp_support" = "1" + register "sata_ports_enable[1]" = "1" # SSD1 + # FIXME: DevSlp breaks S0ix + #register "sata_ports_dev_slp[1]" = "1" # GPP_H12 (SATA1_DEVSLP1) + end + device ref pch_espi on + register "gen1_dec" = "0x00040069" # EC PM channel + register "gen2_dec" = "0x00fc0e01" # AP/EC command + register "gen3_dec" = "0x00fc0f01" # AP/EC debug + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end + device ref p2sb on end + device ref hda on + register "pch_hda_audio_link_hda_enable" = "1" + register "pch_hda_idisp_codec_enable" = "1" + register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" + register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" + end + device ref smbus on end + device ref fast_spi on end + end +end |