summaryrefslogtreecommitdiff
path: root/src/mainboard/system76/lemp9
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/system76/lemp9')
-rw-r--r--src/mainboard/system76/lemp9/Kconfig66
-rw-r--r--src/mainboard/system76/lemp9/Kconfig.name2
-rw-r--r--src/mainboard/system76/lemp9/Makefile.inc4
-rw-r--r--src/mainboard/system76/lemp9/acpi/gpe.asl11
-rw-r--r--src/mainboard/system76/lemp9/acpi/mainboard.asl13
-rw-r--r--src/mainboard/system76/lemp9/acpi/sleep.asl11
-rw-r--r--src/mainboard/system76/lemp9/board_info.txt8
-rw-r--r--src/mainboard/system76/lemp9/bootblock.c10
-rw-r--r--src/mainboard/system76/lemp9/cmos.default3
-rw-r--r--src/mainboard/system76/lemp9/cmos.layout39
-rw-r--r--src/mainboard/system76/lemp9/data.vbtbin4608 -> 0 bytes
-rw-r--r--src/mainboard/system76/lemp9/devicetree.cb201
-rw-r--r--src/mainboard/system76/lemp9/dsdt.asl32
-rw-r--r--src/mainboard/system76/lemp9/gpio.h253
-rw-r--r--src/mainboard/system76/lemp9/hda_verb.c36
-rw-r--r--src/mainboard/system76/lemp9/ramstage.c17
-rw-r--r--src/mainboard/system76/lemp9/romstage.c51
-rw-r--r--src/mainboard/system76/lemp9/spd/samsung-K4AAG165WA-BCTD.spd.hex33
18 files changed, 0 insertions, 790 deletions
diff --git a/src/mainboard/system76/lemp9/Kconfig b/src/mainboard/system76/lemp9/Kconfig
deleted file mode 100644
index dbc9de20b8..0000000000
--- a/src/mainboard/system76/lemp9/Kconfig
+++ /dev/null
@@ -1,66 +0,0 @@
-if BOARD_SYSTEM76_LEMP9
-
-config BOARD_SPECIFIC_OPTIONS
- def_bool y
- select BOARD_ROMSIZE_KB_16384
- select DRIVERS_I2C_HID
- select EC_SYSTEM76_EC
- select HAVE_ACPI_RESUME
- select HAVE_ACPI_TABLES
- select HAVE_CMOS_DEFAULT
- select HAVE_OPTION_TABLE
- select HAVE_SMI_HANDLER
- select HAVE_SPD_IN_CBFS
- select INTEL_GMA_HAVE_VBT
- select INTEL_LPSS_UART_FOR_CONSOLE
- select MEMORY_MAPPED_TPM
- select MAINBOARD_HAS_TPM2
- select NO_UART_ON_SUPERIO
- select SOC_INTEL_COMETLAKE_1
- select SOC_INTEL_COMMON_BLOCK_HDA_VERB
- select SPD_READ_BY_WORD
- select SYSTEM_TYPE_LAPTOP
- select TPM_MEASURED_BOOT
- select USE_LEGACY_8254_TIMER # Fix failure to boot GRUB
-
-config MAINBOARD_DIR
- default "system76/lemp9"
-
-config MAINBOARD_PART_NUMBER
- default "lemp9"
-
-config MAINBOARD_SMBIOS_PRODUCT_NAME
- string
- default "Lemur Pro"
-
-config MAINBOARD_VERSION
- string
- default "lemp9"
-
-config CBFS_SIZE
- default 0xc00000
-
-config CONSOLE_POST
- bool
- default y
-
-config UART_FOR_CONSOLE
- int
- default 2
-
-config DIMM_MAX
- default 2
-
-config VGA_BIOS_ID
- string
- default "8086,9b41"
-
-config TPM_PIRQ
- hex
- default 0x10 # GPP_A7/PIRQA#
-
-config POST_DEVICE
- bool
- default n
-
-endif
diff --git a/src/mainboard/system76/lemp9/Kconfig.name b/src/mainboard/system76/lemp9/Kconfig.name
deleted file mode 100644
index 4a4ab68597..0000000000
--- a/src/mainboard/system76/lemp9/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_SYSTEM76_LEMP9
- bool "lemp9"
diff --git a/src/mainboard/system76/lemp9/Makefile.inc b/src/mainboard/system76/lemp9/Makefile.inc
deleted file mode 100644
index 3d742d6e13..0000000000
--- a/src/mainboard/system76/lemp9/Makefile.inc
+++ /dev/null
@@ -1,4 +0,0 @@
-bootblock-y += bootblock.c
-ramstage-y += ramstage.c
-ramstage-y += hda_verb.c
-SPD_SOURCES = samsung-K4AAG165WA-BCTD
diff --git a/src/mainboard/system76/lemp9/acpi/gpe.asl b/src/mainboard/system76/lemp9/acpi/gpe.asl
deleted file mode 100644
index c1bc04dc9a..0000000000
--- a/src/mainboard/system76/lemp9/acpi/gpe.asl
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-// GPP_D9 SCI
-Method (_L29, 0, Serialized) {
- Debug = Concatenate("GPE _L29: ", ToHexString(\_SB.PCI0.LPCB.EC0.WFNO))
- If (\_SB.PCI0.LPCB.EC0.ECOK) {
- If (\_SB.PCI0.LPCB.EC0.WFNO == One) {
- Notify(\_SB.LID0, 0x80)
- }
- }
-}
diff --git a/src/mainboard/system76/lemp9/acpi/mainboard.asl b/src/mainboard/system76/lemp9/acpi/mainboard.asl
deleted file mode 100644
index 416cc5a151..0000000000
--- a/src/mainboard/system76/lemp9/acpi/mainboard.asl
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#define EC_GPE_SCI 0x50 /* GPP_E16 */
-#define EC_GPE_SWI 0x29 /* GPP_D9 */
-#include <ec/system76/ec/acpi/ec.asl>
-
-Scope (\_SB) {
- #include "sleep.asl"
-}
-
-Scope (\_GPE) {
- #include "gpe.asl"
-}
diff --git a/src/mainboard/system76/lemp9/acpi/sleep.asl b/src/mainboard/system76/lemp9/acpi/sleep.asl
deleted file mode 100644
index 48c50e075e..0000000000
--- a/src/mainboard/system76/lemp9/acpi/sleep.asl
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Method called from _PTS prior to enter sleep state */
-Method (MPTS, 1) {
- \_SB.PCI0.LPCB.EC0.PTS (Arg0)
-}
-
-/* Method called from _WAK prior to wakeup */
-Method (MWAK, 1) {
- \_SB.PCI0.LPCB.EC0.WAK (Arg0)
-}
diff --git a/src/mainboard/system76/lemp9/board_info.txt b/src/mainboard/system76/lemp9/board_info.txt
deleted file mode 100644
index f6784eff02..0000000000
--- a/src/mainboard/system76/lemp9/board_info.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-Vendor name: System76
-Board name: lemp9
-Category: laptop
-Release year: 2020
-ROM package: SOIC-8
-ROM protocol: SPI
-ROM socketed: n
-Flashrom support: y
diff --git a/src/mainboard/system76/lemp9/bootblock.c b/src/mainboard/system76/lemp9/bootblock.c
deleted file mode 100644
index fd6070c06b..0000000000
--- a/src/mainboard/system76/lemp9/bootblock.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <bootblock_common.h>
-#include <gpio.h>
-#include "gpio.h"
-
-void bootblock_mainboard_early_init(void)
-{
- gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
-}
diff --git a/src/mainboard/system76/lemp9/cmos.default b/src/mainboard/system76/lemp9/cmos.default
deleted file mode 100644
index 0d376751c1..0000000000
--- a/src/mainboard/system76/lemp9/cmos.default
+++ /dev/null
@@ -1,3 +0,0 @@
-boot_option=Fallback
-debug_level=Debug
-me_state=Disable
diff --git a/src/mainboard/system76/lemp9/cmos.layout b/src/mainboard/system76/lemp9/cmos.layout
deleted file mode 100644
index a53c3f4bba..0000000000
--- a/src/mainboard/system76/lemp9/cmos.layout
+++ /dev/null
@@ -1,39 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-entries
-
-0 384 r 0 reserved_memory
-
-# RTC_BOOT_BYTE (coreboot hardcoded)
-384 1 e 4 boot_option
-388 4 h 0 reboot_counter
-
-# RTC_CLK_ALTCENTURY
-400 8 r 0 century
-
-412 4 e 6 debug_level
-416 1 e 2 me_state
-417 3 h 0 me_state_counter
-984 16 h 0 check_sum
-
-enumerations
-
-2 0 Enable
-2 1 Disable
-
-4 0 Fallback
-4 1 Normal
-
-6 0 Emergency
-6 1 Alert
-6 2 Critical
-6 3 Error
-6 4 Warning
-6 5 Notice
-6 6 Info
-6 7 Debug
-6 8 Spew
-
-checksums
-
-checksum 408 983 984
diff --git a/src/mainboard/system76/lemp9/data.vbt b/src/mainboard/system76/lemp9/data.vbt
deleted file mode 100644
index f14d8073e9..0000000000
--- a/src/mainboard/system76/lemp9/data.vbt
+++ /dev/null
Binary files differ
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb
deleted file mode 100644
index 77ba265ea9..0000000000
--- a/src/mainboard/system76/lemp9/devicetree.cb
+++ /dev/null
@@ -1,201 +0,0 @@
-chip soc/intel/cannonlake
- register "common_soc_config" = "{
- /* Touchpad */
- .i2c[0] = {
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 80,
- .fall_time_ns = 110,
- },
- }"
-
-# CPU (soc/intel/cannonlake/cpu.c)
- # Power limit
- register "power_limits_config" = "{
- .tdp_pl1_override = 20,
- .tdp_pl2_override = 30,
- }"
-
- # Enable Enhanced Intel SpeedStep
- register "eist_enable" = "1"
-
-# FSP Memory (soc/intel/cannonlake/romstage/fsp_params.c)
- register "SaGv" = "SaGv_Enabled"
- #register "enable_c6dram" = "1"
-
-# FSP Silicon (soc/intel/cannonlake/fsp_params.c)
- # Serial I/O
- register "SerialIoDevMode" = "{
- [PchSerialIoIndexI2C0] = PchSerialIoPci, // Touchpad
- [PchSerialIoIndexUART2] = PchSerialIoSkipInit, // LPSS UART
- }"
-
- # Misc
- register "AcousticNoiseMitigation" = "1"
- #register "dmipwroptimize" = "1"
- #register "satapwroptimize" = "1"
-
- # Power
- register "PchPmSlpS3MinAssert" = "3" # 50ms
- register "PchPmSlpS4MinAssert" = "1" # 1s
- register "PchPmSlpSusMinAssert" = "2" # 500ms
- register "PchPmSlpAMinAssert" = "4" # 2s
-
- # Thermal
- register "tcc_offset" = "12"
-
-# PM Util (soc/intel/cannonlake/pmutil.c)
- # GPE configuration
- # Note that GPE events called out in ASL code rely on this
- # route. i.e. If this route changes then the affected GPE
- # offset bits also need to be changed.
- # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG)
- register "gpe0_dw0" = "PMC_GPP_C"
- register "gpe0_dw1" = "PMC_GPP_D"
- register "gpe0_dw2" = "PMC_GPP_E"
-
-# Actual device tree
- device cpu_cluster 0 on
- device lapic 0 on end
- end
-
- device domain 0 on
- subsystemid 0x1558 0x1401 inherit
- device pci 00.0 on end # Host Bridge
- device pci 02.0 on # Integrated Graphics Device
- register "gfx" = "GMA_DEFAULT_PANEL(0)"
- end
- device pci 04.0 on # SA Thermal device
- register "Device4Enable" = "1"
- end
- device pci 12.0 on end # Thermal Subsystem
- device pci 12.5 off end # UFS SCS
- device pci 12.6 off end # GSPI #2
- device pci 13.0 off end # Integrated Sensor Hub
- device pci 14.0 on # USB xHCI
- # USB2
- register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 1
- register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C port 2
- register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 3
- register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # Camera
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
- # USB3
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 1
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C port 2
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 3
- end
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.3 on
- chip drivers/wifi/generic
- register "wake" = "GPE0_PME_B0"
- device generic 0 on end
- end
- end # CNVi wifi
- device pci 14.5 off end # SDCard
- device pci 15.0 on
- chip drivers/i2c/hid
- register "generic.hid" = ""ELAN040D""
- register "generic.desc" = ""ELAN Touchpad""
- register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
- register "generic.detect" = "1"
- register "hid_desc_reg_offset" = "0x01"
- device i2c 15 on end
- end
- end # I2C #0
- device pci 15.1 off end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 16.5 off end # Management Engine Interface 4
- device pci 17.0 on # SATA
- register "SataSalpSupport" = "1"
- # Port 2 (J_SSD2)
- register "SataPortsEnable[1]" = "1"
- register "SataPortsDevSlp[1]" = "1"
- # Port 3 (J_SSD1)
- register "SataPortsEnable[2]" = "1"
- register "SataPortsDevSlp[2]" = "1"
- end
- device pci 19.0 off end # I2C #4
- device pci 19.1 off end # I2C #5
- device pci 19.2 on end # UART #2
- device pci 1a.0 off end # eMMC
- device pci 1c.0 off end # PCI Express Port 1
- device pci 1c.1 off end # PCI Express Port 2
- device pci 1c.2 off end # PCI Express Port 3
- device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 off end # PCI Express Port 5
- device pci 1c.5 on # PCI Express Port 6
- device pci 00.0 on end # x1 Card reader
- register "PcieRpEnable[5]" = "1"
- register "PcieRpLtrEnable[5]" = "1"
- register "PcieClkSrcUsage[3]" = "5"
- register "PcieClkSrcClkReq[3]" = "3"
- register "PcieRpSlotImplemented[5]" = "1"
- end
- device pci 1c.6 off end # PCI Express Port 7
- device pci 1c.7 on # PCI Express Port 8
- device pci 00.0 on end # x1 M.2/E 2230 (J_WLAN1)
- register "PcieRpEnable[7]" = "1"
- register "PcieRpLtrEnable[7]" = "1"
- register "PcieClkSrcUsage[2]" = "7"
- register "PcieClkSrcClkReq[2]" = "2"
- register "PcieRpSlotImplemented[7]" = "1"
- chip drivers/wifi/generic
- device pci 00.0 on end
- end
- smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
- end
- device pci 1d.0 on # PCI Express Port 9
- device pci 00.0 on end # x4 M.2/M 2280 (J_SSD2)
- register "PcieRpEnable[8]" = "1"
- register "PcieRpLtrEnable[8]" = "1"
- register "PcieClkSrcUsage[4]" = "8"
- register "PcieClkSrcClkReq[4]" = "4"
- register "PcieRpSlotImplemented[8]" = "1"
- smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
- end
- device pci 1d.1 off end # PCI Express Port 10
- device pci 1d.2 off end # PCI Express Port 11
- device pci 1d.3 off end # PCI Express Port 12
- device pci 1d.4 on # PCI Express Port 13
- device pci 00.0 on end # x4 M.2/M 2280 (J_SSD1)
- register "PcieRpEnable[12]" = "1"
- register "PcieRpLtrEnable[12]" = "1"
- register "PcieClkSrcUsage[5]" = "12"
- register "PcieClkSrcClkReq[5]" = "5"
- register "PcieRpSlotImplemented[12]" = "1"
- smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
- end
- device pci 1d.5 off end # PCI Express Port 14
- device pci 1d.6 off end # PCI Express Port 15
- device pci 1d.7 off end # PCI Express Port 16
- device pci 1e.0 off end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1f.0 on # LPC Interface
- # LPC configuration from lspci -s 1f.0 -xxx
- # Address 0x88: Decode 0x68 - 0x6F (EC PM channel)
- register "gen1_dec" = "0x00040069"
- # Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command)
- register "gen2_dec" = "0x00fc0E01"
- # Address 0x90: Decode 0xF00 - 0xFFF (AP/EC debug)
- register "gen3_dec" = "0x00fc0F01"
- chip drivers/pc80/tpm # TPM
- device pnp 0c31.0 on end
- end
- end
- device pci 1f.1 off end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on # Intel HDA
- register "PchHdaAudioLinkHda" = "1"
- end
- device pci 1f.4 on end # SMBus
- device pci 1f.5 on end # PCH SPI
- device pci 1f.6 off end # GbE
- end
-end
diff --git a/src/mainboard/system76/lemp9/dsdt.asl b/src/mainboard/system76/lemp9/dsdt.asl
deleted file mode 100644
index b633254edd..0000000000
--- a/src/mainboard/system76/lemp9/dsdt.asl
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <acpi/acpi.h>
-DefinitionBlock(
- "dsdt.aml",
- "DSDT",
- ACPI_DSDT_REV_2,
- OEM_ID,
- ACPI_TABLE_CREATOR,
- 0x20110725
-)
-{
- #include <acpi/dsdt_top.asl>
- #include <soc/intel/common/block/acpi/acpi/platform.asl>
- #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
- #include <cpu/intel/common/acpi/cpu.asl>
-
- Device (\_SB.PCI0)
- {
- #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
- #include <soc/intel/cannonlake/acpi/southbridge.asl>
- }
-
- #include <southbridge/intel/common/acpi/sleepstates.asl>
-
- Scope (\_SB.PCI0.LPCB)
- {
- #include <drivers/pc80/pc/ps2_controller.asl>
- }
-
- #include "acpi/mainboard.asl"
-}
diff --git a/src/mainboard/system76/lemp9/gpio.h b/src/mainboard/system76/lemp9/gpio.h
deleted file mode 100644
index 59d8d063d9..0000000000
--- a/src/mainboard/system76/lemp9/gpio.h
+++ /dev/null
@@ -1,253 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_GPIO_H
-#define MAINBOARD_GPIO_H
-
-#include <soc/gpio.h>
-
-#ifndef __ACPI__
-
-/* Name format: <pad name> / <net/pin name in schematics> */
-
-/* Early pad configuration in bootblock */
-static const struct pad_config early_gpio_table[] = {
- PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2_RXD */
- PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2_TXD */
- PAD_NC(GPP_C22, UP_20K),
- PAD_NC(GPP_C23, UP_20K),
-};
-
-/* Pad configuration in ramstage. */
-static const struct pad_config gpio_table[] = {
- /* ------- GPIO Group GPD ------- */
- PAD_NC(GPD0, NONE),
- PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1), /* ACPRESENT / AC_PRESENT */
- PAD_NC(GPD2, UP_20K),
- PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), /* PWRBTN# / PWR_BTN# */
- PAD_CFG_NF(GPD4, NONE, DEEP, NF1), /* SLP_S3# / SUSB#_PCH */
- PAD_CFG_NF(GPD5, NONE, DEEP, NF1), /* SLP_S4# / SUSC#_PCH */
- PAD_NC(GPD6, UP_20K),
- PAD_NC(GPD7, NONE),
- PAD_CFG_NF(GPD8, NONE, DEEP, NF1), /* SUSCLK / SUS_CLK */
- PAD_NC(GPD9, UP_20K),
- PAD_NC(GPD10, UP_20K),
- PAD_NC(GPD11, UP_20K),
-
- /* ------- GPIO Group GPP_A ------- */
- PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* RCIN# / SB_KBCRST# */
- PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), /* LAD0 / LPC_AD0 */
- PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), /* LAD1 / LPC_AD1 */
- PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), /* LAD2 / LPC_AD2 */
- PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), /* LAD3 / LPC_AD3 */
- PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* LFRAME# / LPC_FRAME# */
- PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* SERIRQ */
- PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* PIRQA# / TPM_PIRQ# */
- PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* CLKRUN# / PM_CLKRUN#
- Note: R209 is populated despite being
- marked no-stuff in schematic
- */
- PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), /* CLKOUT_LPC0 / PCLK_KBC */
- PAD_NC(GPP_A10, UP_20K),
- PAD_NC(GPP_A11, NONE), /* INTP_OUT (unknown and unused) */
- PAD_NC(GPP_A12, UP_20K),
- PAD_NC(GPP_A13, UP_20K), /* SUSWARN#
- (unused due to missing DeepSx support)
- */
- PAD_NC(GPP_A14, UP_20K),
- PAD_NC(GPP_A15, UP_20K),
- PAD_NC(GPP_A16, UP_20K),
- PAD_NC(GPP_A17, NONE), /* LEDKB_DET#
- (unused in cb; all devices of that
- model have KB LED)
- */
- PAD_NC(GPP_A18, UP_20K),
- PAD_NC(GPP_A19, UP_20K),
- PAD_CFG_GPO(GPP_A20, 0, DEEP), /* GPP_A20 / TEST_R */
- PAD_NC(GPP_A21, UP_20K),
- PAD_NC(GPP_A22, UP_20K),
- PAD_NC(GPP_A23, UP_20K),
-
- /* ------- GPIO Group GPP_B ------- */
- PAD_NC(GPP_B0, UP_20K),
- PAD_NC(GPP_B1, UP_20K),
- PAD_NC(GPP_B2, UP_20K), /* CNVI_WAKE#
- (UART_WAKE# in M.2 spec; unused)
- */
- PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST), /* GPP_B3 (touchpad interrupt) */
- PAD_NC(GPP_B4, UP_20K),
- PAD_NC(GPP_B5, UP_20K),
- PAD_NC(GPP_B6, UP_20K),
- PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* SRCCLKREQ2# / WLAN_CLKREQ# */
- PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* SRCCLKREQ3# / CARD_CLKREQ# */
- PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), /* SRCCLKREQ4# / SSD2_CLKREQ# */
- PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* SRCCLKREQ5# / SSD1_CLKREQ# */
- PAD_NC(GPP_B11, NONE),
- PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* SLP_S0# */
- PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* PLT_RST# */
- PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* SPKR / PCH_SPKR */
- PAD_NC(GPP_B15, UP_20K),
- PAD_NC(GPP_B16, UP_20K),
- PAD_NC(GPP_B17, NONE),
- PAD_NC(GPP_B18, UP_20K),
- PAD_NC(GPP_B19, UP_20K),
- PAD_NC(GPP_B20, UP_20K),
- PAD_NC(GPP_B21, UP_20K),
- PAD_NC(GPP_B22, UP_20K),
- PAD_NC(GPP_B23, UP_20K),
-
- /* ------- GPIO Group GPP_C ------- */
- PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMBCLK / SMB_CLK_DDR */
- PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMBDATA / SMB_DAT_DDR */
- PAD_NC(GPP_C2, UP_20K),
- PAD_NC(GPP_C3, UP_20K),
- PAD_NC(GPP_C4, UP_20K),
- PAD_NC(GPP_C5, UP_20K),
- PAD_NC(GPP_C6, UP_20K),
- PAD_NC(GPP_C7, UP_20K),
- PAD_NC(GPP_C8, UP_20K),
- PAD_NC(GPP_C9, UP_20K),
- PAD_NC(GPP_C10, UP_20K),
- PAD_NC(GPP_C11, UP_20K),
- PAD_NC(GPP_C12, UP_20K),
- PAD_CFG_GPO(GPP_C13, 1, PLTRST), /* GPP_C13 / SSD1_PWR_DN# */
- PAD_NC(GPP_C14, UP_20K),
- PAD_NC(GPP_C15, UP_20K),
- PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_SDA / T_SDA */
- PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_SCL / T_SCL */
- PAD_NC(GPP_C18, UP_20K),
- PAD_NC(GPP_C19, UP_20K),
- PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2_RXD */
- PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2_TXD */
- PAD_NC(GPP_C22, UP_20K),
- PAD_NC(GPP_C23, UP_20K),
-
- /* ------- GPIO Group GPP_D ------- */
- PAD_NC(GPP_D0, UP_20K),
- PAD_NC(GPP_D1, UP_20K),
- PAD_NC(GPP_D2, UP_20K),
- PAD_NC(GPP_D3, UP_20K),
- PAD_NC(GPP_D4, UP_20K),
- PAD_NC(GPP_D5, UP_20K),
- PAD_NC(GPP_D6, UP_20K),
- PAD_NC(GPP_D7, UP_20K),
- PAD_CFG_GPO(GPP_D8, 1, DEEP), /* SB_BLON */
- PAD_CFG_GPI_SCI_LOW(GPP_D9, NONE, DEEP, LEVEL), /* EC SWI# */
- PAD_NC(GPP_D10, NONE), /* DDR_TYPE_D10
- (unused; there is only one on-board
- ram type/model)
- */
- PAD_NC(GPP_D11, NONE), /* BOARD_ID
- (unused in cb; we already know the
- device model)
- */
- PAD_NC(GPP_D12, UP_20K),
- PAD_NC(GPP_D13, UP_20K),
- PAD_CFG_GPO(GPP_D14, 1, PLTRST), /* SSD2_PWR_DN# */
- PAD_NC(GPP_D15, UP_20K),
- PAD_NC(GPP_D16, UP_20K),
- PAD_NC(GPP_D17, UP_20K),
- PAD_NC(GPP_D18, UP_20K),
- PAD_NC(GPP_D19, UP_20K),
- PAD_NC(GPP_D20, UP_20K),
- PAD_NC(GPP_D21, NONE), /* TPM_DET#
- (currently unused in cb; there seem
- to be no devices without TPM)
- */
- PAD_NC(GPP_D22, NONE), /* DDR_TYPE_D22
- (unused in cb; there is only one
- on-board ram type)
- */
- PAD_NC(GPP_D23, UP_20K),
-
- /* ------- GPIO Group GPP_E ------- */
- PAD_NC(GPP_E0, UP_20K),
- PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* SATAXPCIE1 / SATAGP1 */
- PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* SATAXPCIE2 / SATAGP2 */
- PAD_NC(GPP_E3, UP_20K),
- PAD_NC(GPP_E4, UP_20K),
- PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1 */
- PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1), /* DEVSLP2 */
- PAD_NC(GPP_E7, UP_20K),
- PAD_NC(GPP_E8, NONE),
- PAD_NC(GPP_E9, NONE),
- PAD_NC(GPP_E10, NONE),
- PAD_NC(GPP_E11, NONE),
- PAD_NC(GPP_E12, NONE),
- PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* DDPB_HPD0 / MUX_HPD */
- PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDPC_HPD1 / HDMI_HPD */
- PAD_CFG_GPI_SMI_LOW(GPP_E15, NONE, DEEP, EDGE_SINGLE), /* EC SMI# */
- PAD_CFG_GPI_SCI_LOW(GPP_E16, NONE, PLTRST, LEVEL), /* EC SCI# */
- PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* EDP_HPD */
- PAD_NC(GPP_E18, UP_20K),
- PAD_NC(GPP_E19, NONE),
- PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), /* DPPC_CTRLCLK / HDMI_CTRLCLK */
- PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), /* DPPC_CTRLDATA / HDMI_CTRLDATA */
- PAD_NC(GPP_E22, UP_20K),
- PAD_NC(GPP_E23, UP_20K),
-
- /* ------- GPIO Group GPP_F ------- */
- PAD_NC(GPP_F0, UP_20K),
- PAD_NC(GPP_F1, UP_20K),
- PAD_NC(GPP_F2, UP_20K),
- PAD_NC(GPP_F3, UP_20K),
- PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* CNV_BRI_DT / CNVI_BRI_DT */
- PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1), /* CNV_BRI_RSP / CNVI_BRI_RSP */
- PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), /* CNV_RGI_DT / CNVI_RGI_DT */
- PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1), /* CNV_RGI_RSP / CNVI_RGI_RSP */
- PAD_NC(GPP_F8, UP_20K),
- PAD_NC(GPP_F9, UP_20K),
- PAD_NC(GPP_F10, UP_20K),
- PAD_NC(GPP_F11, UP_20K),
- PAD_NC(GPP_F12, UP_20K),
- PAD_NC(GPP_F13, UP_20K),
- PAD_NC(GPP_F14, UP_20K),
- PAD_NC(GPP_F15, UP_20K),
- PAD_NC(GPP_F16, UP_20K),
- PAD_NC(GPP_F17, UP_20K),
- PAD_NC(GPP_F18, UP_20K),
- PAD_NC(GPP_F19, UP_20K),
- PAD_NC(GPP_F20, UP_20K),
- PAD_NC(GPP_F21, UP_20K),
- PAD_NC(GPP_F22, UP_20K),
- PAD_NC(GPP_F23, NONE),
-
- /* ------- GPIO Group GPP_G ------- */
- PAD_NC(GPP_G0, UP_20K),
- PAD_NC(GPP_G1, UP_20K),
- PAD_NC(GPP_G2, UP_20K),
- PAD_NC(GPP_G3, UP_20K),
- PAD_NC(GPP_G4, UP_20K),
- PAD_NC(GPP_G5, UP_20K),
- PAD_NC(GPP_G6, UP_20K),
- PAD_NC(GPP_G7, UP_20K),
-
- /* ------- GPIO Group GPP_H ------- */
- PAD_NC(GPP_H0, UP_20K),
- PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3), /* CNV_RF_RESET# / CNVI_RST# */
- PAD_CFG_NF(GPP_H2, DN_20K, DEEP, NF3), /* MODEM_CLKREQ / CNVI_CLKREQ */
- PAD_NC(GPP_H3, UP_20K),
- PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), /* I2C2_SDA / SMD_7411 */
- PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), /* I2C2_SCL / SMC_7411 */
- PAD_NC(GPP_H6, UP_20K),
- PAD_NC(GPP_H7, UP_20K),
- PAD_NC(GPP_H8, UP_20K),
- PAD_NC(GPP_H9, UP_20K),
- PAD_NC(GPP_H10, UP_20K),
- PAD_NC(GPP_H11, UP_20K),
- PAD_NC(GPP_H12, UP_20K),
- PAD_NC(GPP_H13, UP_20K),
- PAD_NC(GPP_H14, UP_20K),
- PAD_NC(GPP_H15, UP_20K),
- PAD_NC(GPP_H16, UP_20K),
- PAD_NC(GPP_H17, UP_20K),
- PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* CPU_C10_GATE# */
- PAD_NC(GPP_H19, UP_20K),
- PAD_NC(GPP_H20, UP_20K),
- PAD_NC(GPP_H21, NONE),
- PAD_NC(GPP_H22, UP_20K),
- PAD_NC(GPP_H23, UP_20K),
-};
-
-#endif
-
-#endif
diff --git a/src/mainboard/system76/lemp9/hda_verb.c b/src/mainboard/system76/lemp9/hda_verb.c
deleted file mode 100644
index 1b9386d388..0000000000
--- a/src/mainboard/system76/lemp9/hda_verb.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
- /* Realtek ALC293 */
- 0x10ec0293, /* Vendor ID */
- 0x15581401, /* Subsystem ID */
- 13, /* Number of entries */
- AZALIA_SUBVENDOR(0, 0x15581401),
- AZALIA_RESET(1),
- AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
- AZALIA_PIN_CFG(0, 0x13, 0x40000000),
- AZALIA_PIN_CFG(0, 0x14, 0x90170110),
- AZALIA_PIN_CFG(0, 0x15, 0x02211020),
- AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
- AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
- AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
- AZALIA_PIN_CFG(0, 0x1a, 0x01a1913c),
- AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
- AZALIA_PIN_CFG(0, 0x1d, 0x41748245),
- AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-
- /* Intel GPU HDMI */
- 0x8086280b, /* Vendor ID */
- 0x80860101, /* Subsystem ID */
- 4, /* Number of entries */
- AZALIA_SUBVENDOR(2, 0x80860101),
- AZALIA_PIN_CFG(2, 0x05, 0x18560010),
- AZALIA_PIN_CFG(2, 0x06, 0x18560010),
- AZALIA_PIN_CFG(2, 0x07, 0x18560010),
-};
-
-const u32 pc_beep_verbs[] = {};
-
-AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/system76/lemp9/ramstage.c b/src/mainboard/system76/lemp9/ramstage.c
deleted file mode 100644
index a5ada97e5d..0000000000
--- a/src/mainboard/system76/lemp9/ramstage.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <soc/ramstage.h>
-#include "gpio.h"
-#include <smbios.h>
-
-smbios_wakeup_type smbios_system_wakeup_type(void)
-{
- return SMBIOS_WAKEUP_TYPE_POWER_SWITCH;
-}
-
-void mainboard_silicon_init_params(FSPS_UPD *supd)
-{
- /* Configure pads prior to SiliconInit() in case there's any
- * dependencies during hardware initialization. */
- gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
-}
diff --git a/src/mainboard/system76/lemp9/romstage.c b/src/mainboard/system76/lemp9/romstage.c
deleted file mode 100644
index 3b9c896f1b..0000000000
--- a/src/mainboard/system76/lemp9/romstage.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <soc/cnl_memcfg_init.h>
-#include <soc/romstage.h>
-
-static const struct cnl_mb_cfg memcfg = {
- /* Parameters required to access SPD for CH0D0/CH0D1/CH1D0/CH1D1. */
- .spd[0] = {
- .read_type = READ_SPD_CBFS,
- .spd_spec = {.spd_index = 0},
- },
- .spd[1] = {.read_type = NOT_EXISTING},
- .spd[2] = {
- .read_type = READ_SMBUS,
- .spd_spec = {.spd_smbus_address = 0xa4},
- },
- .spd[3] = {.read_type = NOT_EXISTING},
-
- /*
- * Rcomp resistor values. These values represent the resistance in
- * ohms of the three rcomp resistors attached to the DDR_COMP_0,
- * DDR_COMP_1, and DDR_COMP_2 pins on the DRAM.
- */
- .rcomp_resistor = { 121, 81, 100 },
-
- /* Rcomp target values */
- .rcomp_targets = { 100, 40, 20, 20, 26 },
-
- /*
- * Indicates whether memory is interleaved.
- * Set to 1 for an interleaved design,
- * set to 0 for non-interleaved design.
- */
- .dq_pins_interleaved = 1,
-
- /*
- * VREF_CA configuration.
- * Set to 0 VREF_CA goes to both CH_A and CH_B,
- * set to 1 VREF_CA goes to CH_A and VREF_DQ_A goes to CH_B,
- * set to 2 VREF_CA goes to CH_A and VREF_DQ_B goes to CH_B.
- */
- .vref_ca_config = 2,
-
- /* Early Command Training */
- .ect = 0,
-};
-
-void mainboard_memory_init_params(FSPM_UPD *memupd)
-{
- cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg);
-}
diff --git a/src/mainboard/system76/lemp9/spd/samsung-K4AAG165WA-BCTD.spd.hex b/src/mainboard/system76/lemp9/spd/samsung-K4AAG165WA-BCTD.spd.hex
deleted file mode 100644
index f747f7c34e..0000000000
--- a/src/mainboard/system76/lemp9/spd/samsung-K4AAG165WA-BCTD.spd.hex
+++ /dev/null
@@ -1,33 +0,0 @@
-# Samsung K4AAG165WA-BCTD
-23 11 0C 03 46 29 00 08 00 60 00 03 02 03 00 00
-00 00 06 0D F8 3F 00 00 6E 6E 6E 11 00 6E F0 0A
-20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 16 36 0B 35
-16 36 0B 35 00 00 16 36 0B 35 16 36 0B 35 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 9C B5 00 00 00 00 E7 00 F7 4B
-0F 11 02 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 DB 08
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-80 CE 00 00 00 00 00 00 00 4B 34 41 41 47 31 36
-35 57 41 2D 42 43 54 44 20 20 20 20 20 00 80 CE
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00