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-rw-r--r--src/mainboard/system76/darp7/devicetree.cb3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/system76/darp7/devicetree.cb b/src/mainboard/system76/darp7/devicetree.cb
index 21f8141c5f..4b7ad233ea 100644
--- a/src/mainboard/system76/darp7/devicetree.cb
+++ b/src/mainboard/system76/darp7/devicetree.cb
@@ -113,8 +113,7 @@ chip soc/intel/tigerlake
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B16)" # SSD1_PWR_EN
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D13)" # GPP_D13_SSD1_PLT_RST#
- # TODO: Support disable/enable CPU RP clock
- register "srcclk_pin" = "-1" # SSD1_CLKREQ#
+ register "srcclk_pin" = "0" # SSD1_CLKREQ#
device generic 0 on end
end
end