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-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/Kconfig38
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/Makefile.inc27
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/devicetree.cb2
3 files changed, 40 insertions, 27 deletions
diff --git a/src/mainboard/supermicro/h8dmr_fam10/Kconfig b/src/mainboard/supermicro/h8dmr_fam10/Kconfig
index edface050b..fdae17e44b 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/Kconfig
+++ b/src/mainboard/supermicro/h8dmr_fam10/Kconfig
@@ -15,6 +15,8 @@ config BOARD_SUPERMICRO_H8DMR_FAM10
select LIFT_BSP_APIC_ID
select AMDMCT
select BOARD_ROMSIZE_KB_1024
+ select TINY_BOOTBLOCK
+ select ENABLE_APIC_EXT_ID
config MAINBOARD_DIR
string
@@ -23,27 +25,42 @@ config MAINBOARD_DIR
config DCACHE_RAM_BASE
hex
- default 0xc8000
+ default 0xc4000
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config DCACHE_RAM_SIZE
hex
- default 0x08000
+ default 0x0c000
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
- default 0x01000
+ default 0x04000
+ depends on BOARD_SUPERMICRO_H8DMR_FAM10
+
+config RAMBASE
+ hex
+ default 0x200000
+ depends on BOARD_SUPERMICRO_H8DMR_FAM10
+
+config RAMTOP
+ hex
+ default 0x1000000
+ depends on BOARD_SUPERMICRO_H8DMR_FAM10
+
+config HEAP_SIZE
+ hex
+ default 0xc0000
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config APIC_ID_OFFSET
hex
- default 0x10
+ default 0x0
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config MEM_TRAIN_SEQ
int
- default 1
+ default 2
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config SB_HT_CHAIN_ON_BUS0
@@ -78,7 +95,7 @@ config HW_MEM_HOLE_SIZEK
config MAX_CPUS
int
- default 4
+ default 8
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config MAX_PHYSICAL_CPUS
@@ -88,12 +105,12 @@ config MAX_PHYSICAL_CPUS
config HT_CHAIN_END_UNITID_BASE
hex
- default 0x0
+ default 0x20
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config HT_CHAIN_UNITID_BASE
hex
- default 0x0
+ default 0x1
depends on BOARD_SUPERMICRO_H8DMR_FAM10
config USE_INIT
@@ -115,3 +132,8 @@ config AMD_UCODE_PATCH_FILE
string
default "mc_patch_0100009f.h"
depends on BOARD_SUPERMICRO_H8DMR_FAM10
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_SUPERMICRO_H8DMR_FAM10
diff --git a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
index 5d5c44ae4b..9d53b85f0c 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
+++ b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
@@ -30,19 +30,12 @@ obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
initobj-y += crt0.o
# FIXME in $(top)/Makefile
-crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
-crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
-crt0-y += ../../../../src/arch/i386/lib/id.inc
-crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
crt0-y += auto.inc
ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
-ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
-ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
-ldscript-y += ../../../../src/arch/i386/lib/id.lds
-ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
+ldscript-y += ../../../../src/cpu/x86/32bit/entry32.lds
ldscript-y += ../../../../src/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
@@ -55,19 +48,19 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
- iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
- perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex
- mv pci2.hex ssdt2.c
+ iasl -p $(obj)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
+ perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' $(obj)/pci2.hex
+ mv $(obj)/pci2.hex $(obj)/ssdt2.c
$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
- iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
- perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
- mv pci3.hex ssdt3.c
+ iasl -p $(obj)/pci3 -tc $(CONFIG_MAINBOARD)/
+ perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' $(obj)/pci3.hex
+ mv $(obj)/pci3.hex $(obj)/ssdt3.c
$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
- iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
- perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
- mv pci4.hex ssdt4.c
+ iasl -p $(obj)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
+ perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
+ mv $(obj)/pci4.hex $(obj)/ssdt4.c
$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
diff --git a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
index 9b93eef507..8d8936c92f 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
+++ b/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
@@ -1,5 +1,3 @@
-dir /southbridge/nvidia/mcp55
-
chip northbridge/amd/amdfam10/root_complex
device apic_cluster 0 on
chip cpu/amd/socket_F_1207