diff options
Diffstat (limited to 'src/mainboard/supermicro')
| -rw-r--r-- | src/mainboard/supermicro/h8dme/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8dme/romstage.c | 7 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8dmr/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8dmr/romstage.c | 7 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/romstage.c | 5 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/romstage.c | 5 |
6 files changed, 6 insertions, 20 deletions
diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig index 10fcbb368e..08151a0ec4 100644 --- a/src/mainboard/supermicro/h8dme/Kconfig +++ b/src/mainboard/supermicro/h8dme/Kconfig @@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT select K8_ALLOCATE_IO_RANGE + select SET_FIDVID config MAINBOARD_DIR string diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index cb6d8ecddb..c1c597bcfc 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -20,11 +20,6 @@ #define SET_NB_CFG_54 1 #endif -// used by init_cpus and fidvid -#define SET_FIDVID 1 -//if we want to wait for core1 done before DQS training, set it to 0 -#define SET_FIDVID_CORE0_ONLY 1 - #if CONFIG_K8_REV_F_SUPPORT == 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif @@ -269,7 +264,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* it will set up chains and store link pair for optimization later */ ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn -#if SET_FIDVID == 1 +#if CONFIG_SET_FIDVID { msr_t msr; diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig index 5056446328..77103300b4 100644 --- a/src/mainboard/supermicro/h8dmr/Kconfig +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT select K8_ALLOCATE_IO_RANGE + select SET_FIDVID config MAINBOARD_DIR string diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index 4abb4d099e..1cf2446c29 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -23,11 +23,6 @@ #define SET_NB_CFG_54 1 #endif -//used by init_cpus and fidvid -#define SET_FIDVID 1 -//if we want to wait for core1 done before DQS training, set it to 0 -#define SET_FIDVID_CORE0_ONLY 1 - #if CONFIG_K8_REV_F_SUPPORT == 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif @@ -198,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* it will set up chains and store link pair for optimization later */ ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn -#if SET_FIDVID == 1 +#if CONFIG_SET_FIDVID { msr_t msr; msr=rdmsr(0xc0010042); diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 294677c5c1..06347db2ab 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -27,9 +27,6 @@ #define SET_NB_CFG_54 1 #endif -#define SET_FIDVID 1 -#define SET_FIDVID_CORE_RANGE 0 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -214,7 +211,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x38); -#if SET_FIDVID == 1 +#if CONFIG_SET_FIDVID msr = rdmsr(0xc0010071); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index ee858a89cd..5e7b32b4d9 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -27,9 +27,6 @@ #define SET_NB_CFG_54 1 #endif -#define SET_FIDVID 1 -#define SET_FIDVID_CORE_RANGE 0 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -256,7 +253,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x38); -#if SET_FIDVID == 1 +#if CONFIG_SET_FIDVID msr = rdmsr(0xc0010071); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo); |