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-rw-r--r--src/mainboard/supermicro/h8dme/get_bus_conf.c4
-rw-r--r--src/mainboard/supermicro/h8dme/irq_tables.c4
-rw-r--r--src/mainboard/supermicro/h8dme/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8dme/romstage.c6
-rw-r--r--src/mainboard/supermicro/h8dmr/get_bus_conf.c4
-rw-r--r--src/mainboard/supermicro/h8dmr/irq_tables.c4
-rw-r--r--src/mainboard/supermicro/h8dmr/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c6
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/irq_tables.c4
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c26
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c6
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/irq_tables.c4
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/mptable.c2
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c26
-rw-r--r--src/mainboard/supermicro/x6dai_g/mptable.c4
-rw-r--r--src/mainboard/supermicro/x6dhe_g/mptable.c18
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/mptable.c18
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/mptable.c20
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/mptable.c16
20 files changed, 89 insertions, 89 deletions
diff --git a/src/mainboard/supermicro/h8dme/get_bus_conf.c b/src/mainboard/supermicro/h8dme/get_bus_conf.c
index 3402d9d5f6..8954829b68 100644
--- a/src/mainboard/supermicro/h8dme/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dme/get_bus_conf.c
@@ -114,7 +114,7 @@ void get_bus_conf(void)
bus_mcp55[2]++;
}
else {
- printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
bus_mcp55[1] = 2;
bus_mcp55[2] = 3;
@@ -128,7 +128,7 @@ void get_bus_conf(void)
bus_isa++;
}
else {
- printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
+ printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
bus_isa = bus_mcp55[i-1]+1;
}
}
diff --git a/src/mainboard/supermicro/h8dme/irq_tables.c b/src/mainboard/supermicro/h8dme/irq_tables.c
index 49c7c99b22..4aaf1497f0 100644
--- a/src/mainboard/supermicro/h8dme/irq_tables.c
+++ b/src/mainboard/supermicro/h8dme/irq_tables.c
@@ -75,7 +75,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk_info("Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
@@ -112,7 +112,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->checksum = sum;
}
- printk_info("done.\n");
+ printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
diff --git a/src/mainboard/supermicro/h8dme/mptable.c b/src/mainboard/supermicro/h8dme/mptable.c
index e611b9a622..64ffbb71a2 100644
--- a/src/mainboard/supermicro/h8dme/mptable.c
+++ b/src/mainboard/supermicro/h8dme/mptable.c
@@ -162,7 +162,7 @@ void *smp_write_config_table(void *v)
/* Compute the checksums */
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index 4b08206a0f..3219cd25e8 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -102,7 +102,7 @@ static void dump_smbus_registers(void)
int j;
if (smbus_read_byte(device, 0) < 0)
continue;
- printk_debug("smbus: %02x", device);
+ printk(BIOS_DEBUG, "smbus: %02x", device);
for (j = 0; j < 256; j++) {
int status;
unsigned char byte;
@@ -111,10 +111,10 @@ static void dump_smbus_registers(void)
break;
}
if ((j & 0xf) == 0) {
- printk_debug("\r\n%02x: ", j);
+ printk(BIOS_DEBUG, "\r\n%02x: ", j);
}
byte = status & 0xff;
- printk_debug("%02x ", byte);
+ printk(BIOS_DEBUG, "%02x ", byte);
}
print_debug("\r\n");
}
diff --git a/src/mainboard/supermicro/h8dmr/get_bus_conf.c b/src/mainboard/supermicro/h8dmr/get_bus_conf.c
index 3402d9d5f6..8954829b68 100644
--- a/src/mainboard/supermicro/h8dmr/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dmr/get_bus_conf.c
@@ -114,7 +114,7 @@ void get_bus_conf(void)
bus_mcp55[2]++;
}
else {
- printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
bus_mcp55[1] = 2;
bus_mcp55[2] = 3;
@@ -128,7 +128,7 @@ void get_bus_conf(void)
bus_isa++;
}
else {
- printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
+ printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
bus_isa = bus_mcp55[i-1]+1;
}
}
diff --git a/src/mainboard/supermicro/h8dmr/irq_tables.c b/src/mainboard/supermicro/h8dmr/irq_tables.c
index 49c7c99b22..4aaf1497f0 100644
--- a/src/mainboard/supermicro/h8dmr/irq_tables.c
+++ b/src/mainboard/supermicro/h8dmr/irq_tables.c
@@ -75,7 +75,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk_info("Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
@@ -112,7 +112,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->checksum = sum;
}
- printk_info("done.\n");
+ printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
diff --git a/src/mainboard/supermicro/h8dmr/mptable.c b/src/mainboard/supermicro/h8dmr/mptable.c
index e611b9a622..64ffbb71a2 100644
--- a/src/mainboard/supermicro/h8dmr/mptable.c
+++ b/src/mainboard/supermicro/h8dmr/mptable.c
@@ -162,7 +162,7 @@ void *smp_write_config_table(void *v)
/* Compute the checksums */
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c
index 79520bdcf3..6604efff22 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c
@@ -102,7 +102,7 @@ void get_bus_conf(void)
m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
- printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
}
for(i=2; i<8;i++) {
@@ -111,7 +111,7 @@ void get_bus_conf(void)
m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
- printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
+ printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
}
}
@@ -124,7 +124,7 @@ void get_bus_conf(void)
m->bus_type[j] = 1;
if(m->bus_isa <= busn_max)
m->bus_isa = busn_max + 1;
- printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
+ printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
}
/*I/O APICs: APIC ID Version State Address*/
diff --git a/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c b/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
index 82a53c1705..e9bf8c46f7 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be between 0xf0000 & 0x100000 */
- printk_info("Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
@@ -131,7 +131,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->checksum = sum;
}
- printk_info("done.\n");
+ printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
diff --git a/src/mainboard/supermicro/h8dmr_fam10/mptable.c b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
index cc7a607cb0..8a30fe65bf 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
@@ -149,7 +149,7 @@ void *smp_write_config_table(void *v)
/* Compute the checksums */
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 0648105d22..98d9e9f45d 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -197,17 +197,17 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
uart_init();
console_init();
- printk_debug("\n");
+ printk(BIOS_DEBUG, "\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
val = cpuid_eax(1);
- printk_debug("BSP Family_Model: %08x \n", val);
- printk_debug("*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
- printk_debug("bsp_apicid = %02x \n", bsp_apicid);
- printk_debug("cpu_init_detectedx = %08x \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
+ printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "bsp_apicid = %02x \n", bsp_apicid);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08x \n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
@@ -238,7 +238,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
/* Core0 on each node is configured. Now setup any additional cores. */
- printk_debug("start_other_cores()\n");
+ printk(BIOS_DEBUG, "start_other_cores()\n");
start_other_cores();
post_code(0x37);
wait_all_other_cores_started(bsp_apicid);
@@ -248,7 +248,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#if FAM10_SET_FIDVID == 1
msr = rdmsr(0xc0010071);
- printk_debug("\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
/* FIXME: The sb fid change may survive the warm reset and only
* need to be done once.*/
@@ -266,7 +266,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* show final fid and vid */
msr=rdmsr(0xc0010071);
- printk_debug("End FIDVIDMSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
#endif
wants_reset = mcp55_early_setup_x();
@@ -279,17 +279,17 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
if (wants_reset)
- printk_debug("mcp55_early_setup_x wanted additional reset!\n");
+ printk(BIOS_DEBUG, "mcp55_early_setup_x wanted additional reset!\n");
post_code(0x3B);
/* It's the time to set ctrl in sysinfo now; */
-printk_debug("fill_mem_ctrl()\n");
+printk(BIOS_DEBUG, "fill_mem_ctrl()\n");
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
post_code(0x3D);
-//printk_debug("enable_smbus()\n");
+//printk(BIOS_DEBUG, "enable_smbus()\n");
// enable_smbus(); /* enable in sio_setup */
post_code(0x3E);
@@ -299,11 +299,11 @@ post_code(0x3E);
post_code(0x40);
- printk_debug("raminit_amdmct()\n");
+ printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
post_code(0x41);
-// printk_debug("\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
+// printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x42); // Should never see this post code.
diff --git a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
index effb614cf2..2ee436b9e7 100644
--- a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
@@ -108,7 +108,7 @@ void get_bus_conf(void)
m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
- printk_debug("ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
}
for(i=2; i<8;i++) {
@@ -117,7 +117,7 @@ void get_bus_conf(void)
m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
- printk_debug("ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
+ printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
}
}
@@ -143,7 +143,7 @@ void get_bus_conf(void)
m->bus_type[j] = 1;
if(m->bus_isa <= busn_max)
m->bus_isa = busn_max + 1;
- printk_debug("i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
+ printk(BIOS_DEBUG, "i=%d bus range: [%x, %x] bus_isa=%x\n",i, busn, busn_max, m->bus_isa);
}
/*I/O APICs: APIC ID Version State Address*/
diff --git a/src/mainboard/supermicro/h8qme_fam10/irq_tables.c b/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
index ec59d9ed86..26fcb4ace1 100644
--- a/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
+++ b/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
@@ -76,7 +76,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
addr &= ~15;
/* This table must be between 0xf0000 & 0x100000 */
- printk_info("Writing IRQ routing tables to 0x%x...", addr);
+ printk(BIOS_INFO, "Writing IRQ routing tables to 0x%x...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
@@ -131,7 +131,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->checksum = sum;
}
- printk_info("done.\n");
+ printk(BIOS_INFO, "done.\n");
return (unsigned long) pirq_info;
diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c
index edf7b7364f..fa59c9f498 100644
--- a/src/mainboard/supermicro/h8qme_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c
@@ -146,7 +146,7 @@ void *smp_write_config_table(void *v)
/* Compute the checksums */
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 45989aa5eb..ae20cdd53c 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -241,16 +241,16 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
uart_init();
console_init();
write_GPIO();
- printk_debug("\n");
+ printk(BIOS_DEBUG, "\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
val = cpuid_eax(1);
- printk_debug("BSP Family_Model: %08x \n", val);
- printk_debug("*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
- printk_debug("bsp_apicid = %02x \n", bsp_apicid);
- printk_debug("cpu_init_detectedx = %08x \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
+ printk(BIOS_DEBUG, "*sysinfo range: ["); print_debug_hex32((u32)sysinfo); print_debug(","); print_debug_hex32((u32)sysinfo+sizeof(struct sys_info)); print_debug("]\n");
+ printk(BIOS_DEBUG, "bsp_apicid = %02x \n", bsp_apicid);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08x \n", cpu_init_detectedx);
/* Setup sysinfo defaults */
set_sysinfo_in_ram(0);
@@ -281,7 +281,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
/* Core0 on each node is configured. Now setup any additional cores. */
- printk_debug("start_other_cores()\n");
+ printk(BIOS_DEBUG, "start_other_cores()\n");
start_other_cores();
post_code(0x37);
wait_all_other_cores_started(bsp_apicid);
@@ -291,7 +291,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#if FAM10_SET_FIDVID == 1
msr = rdmsr(0xc0010071);
- printk_debug("\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
/* FIXME: The sb fid change may survive the warm reset and only
* need to be done once.*/
@@ -309,7 +309,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* show final fid and vid */
msr=rdmsr(0xc0010071);
- printk_debug("End FIDVIDMSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
+ printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
#endif
wants_reset = mcp55_early_setup_x();
@@ -322,17 +322,17 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
if (wants_reset)
- printk_debug("mcp55_early_setup_x wanted additional reset!\n");
+ printk(BIOS_DEBUG, "mcp55_early_setup_x wanted additional reset!\n");
post_code(0x3B);
/* It's the time to set ctrl in sysinfo now; */
-printk_debug("fill_mem_ctrl()\n");
+printk(BIOS_DEBUG, "fill_mem_ctrl()\n");
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
post_code(0x3D);
-//printk_debug("enable_smbus()\n");
+//printk(BIOS_DEBUG, "enable_smbus()\n");
// enable_smbus(); /* enable in sio_setup */
post_code(0x3E);
@@ -342,11 +342,11 @@ post_code(0x3E);
post_code(0x40);
- printk_debug("raminit_amdmct()\n");
+ printk(BIOS_DEBUG, "raminit_amdmct()\n");
raminit_amdmct(sysinfo);
post_code(0x41);
-// printk_debug("\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
+// printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x42); // Should never see this post code.
diff --git a/src/mainboard/supermicro/x6dai_g/mptable.c b/src/mainboard/supermicro/x6dai_g/mptable.c
index 9d793c44a6..aad8856272 100644
--- a/src/mainboard/supermicro/x6dai_g/mptable.c
+++ b/src/mainboard/supermicro/x6dai_g/mptable.c
@@ -44,7 +44,7 @@ void *smp_write_config_table(void *v)
bus_isa++;
}
else {
- printk_debug("ERROR - could not find PCI 0:1e.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
bus_6300 = 5;
bus_isa = 6;
}
@@ -128,7 +128,7 @@ void *smp_write_config_table(void *v)
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/x6dhe_g/mptable.c b/src/mainboard/supermicro/x6dhe_g/mptable.c
index ea8f3590a5..2b5995bc0e 100644
--- a/src/mainboard/supermicro/x6dhe_g/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g/mptable.c
@@ -45,7 +45,7 @@ void *smp_write_config_table(void *v)
bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
- printk_debug("ERROR - could not find PCI 0:1c.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n");
bus_esb6300_2 = 6;
}
@@ -57,7 +57,7 @@ void *smp_write_config_table(void *v)
bus_isa++;
}
else {
- printk_debug("ERROR - could not find PCI 0:1e.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
bus_esb6300_1 = 7;
bus_isa = 8;
@@ -69,7 +69,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:00.1, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
bus_pxhd_1 = 2;
}
@@ -80,7 +80,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
bus_pxhd_2 = 3;
}
@@ -108,8 +108,8 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 1:00.1\n");
- printk_debug("CONFIG_DEBUG: Dev= %p\n", dev);
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
+ printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
}
/* PXHd apic 5 */
dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
@@ -120,8 +120,8 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 1:00.3\n");
- printk_debug("CONFIG_DEBUG: Dev= %p\n", dev);
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
+ printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
}
}
@@ -188,7 +188,7 @@ void *smp_write_config_table(void *v)
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c
index ea8f3590a5..2b5995bc0e 100644
--- a/src/mainboard/supermicro/x6dhe_g2/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g2/mptable.c
@@ -45,7 +45,7 @@ void *smp_write_config_table(void *v)
bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
else {
- printk_debug("ERROR - could not find PCI 0:1c.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n");
bus_esb6300_2 = 6;
}
@@ -57,7 +57,7 @@ void *smp_write_config_table(void *v)
bus_isa++;
}
else {
- printk_debug("ERROR - could not find PCI 0:1e.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
bus_esb6300_1 = 7;
bus_isa = 8;
@@ -69,7 +69,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:00.1, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
bus_pxhd_1 = 2;
}
@@ -80,7 +80,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
bus_pxhd_2 = 3;
}
@@ -108,8 +108,8 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 1:00.1\n");
- printk_debug("CONFIG_DEBUG: Dev= %p\n", dev);
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
+ printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
}
/* PXHd apic 5 */
dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
@@ -120,8 +120,8 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 1:00.3\n");
- printk_debug("CONFIG_DEBUG: Dev= %p\n", dev);
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
+ printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
}
}
@@ -188,7 +188,7 @@ void *smp_write_config_table(void *v)
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/x6dhr_ig/mptable.c b/src/mainboard/supermicro/x6dhr_ig/mptable.c
index 7c13b8fd32..fd80a52492 100644
--- a/src/mainboard/supermicro/x6dhr_ig/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig/mptable.c
@@ -48,7 +48,7 @@ void *smp_write_config_table(void *v)
bus_isa++;
}
else {
- printk_debug("ERROR - could not find PCI 0:1f.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1f.0, using defaults\n");
bus_ich5r_1 = 9;
bus_isa = 10;
@@ -60,7 +60,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:00.1, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
bus_pxhd_1 = 3;
}
@@ -71,7 +71,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
bus_pxhd_2 = 4;
}
@@ -83,7 +83,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:00.1, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
bus_pxhd_3 = 6;
}
@@ -94,7 +94,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
bus_pxhd_4 = 7;
}
@@ -122,7 +122,7 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 2:00.1\n");
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.1\n");
}
/* pxhd apic 4 */
dev = dev_find_slot(2, PCI_DEVFN(0x00,3));
@@ -133,7 +133,7 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 2:00.3\n");
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.3\n");
}
/* pxhd apic 5 */
dev = dev_find_slot(5, PCI_DEVFN(0x00,1));
@@ -144,7 +144,7 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 5:00.1\n");
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.1\n");
}
/* pxhd apic 8 */
dev = dev_find_slot(5, PCI_DEVFN(0x00,3));
@@ -155,7 +155,7 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 5:00.3\n");
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.3\n");
}
}
@@ -222,7 +222,7 @@ void *smp_write_config_table(void *v)
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
index 61ece13f5a..f71114446e 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
@@ -48,7 +48,7 @@ void *smp_write_config_table(void *v)
bus_isa++;
}
else {
- printk_debug("ERROR - could not find PCI 0:1e.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
bus_ich5r_1 = 7;
bus_isa = 8;
@@ -60,7 +60,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:00.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.0, using defaults\n");
bus_pxhd_1 = 2;
}
@@ -71,7 +71,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 1:00.2, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.2, using defaults\n");
bus_pxhd_2 = 3;
}
@@ -83,7 +83,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 0:04.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0, using defaults\n");
bus_pxhd_3 = 5;
}
@@ -94,7 +94,7 @@ void *smp_write_config_table(void *v)
}
else {
- printk_debug("ERROR - could not find PCI 0:06.0, using defaults\n");
+ printk(BIOS_DEBUG, "ERROR - could not find PCI 0:06.0, using defaults\n");
bus_pxhd_4 = 6;
}
@@ -122,7 +122,7 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 1:00.1\n");
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
}
/* pxhd apic 4 */
dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
@@ -133,7 +133,7 @@ void *smp_write_config_table(void *v)
}
}
else {
- printk_debug("ERROR - could not find IOAPIC PCI 1:00.3\n");
+ printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
}
}
/* ISA backward compatibility interrupts */
@@ -205,7 +205,7 @@ void *smp_write_config_table(void *v)
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
- printk_debug("Wrote the mp table end at: %p - %p\n",
+ printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
mc, smp_next_mpe_entry(mc));
return smp_next_mpe_entry(mc);
}