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-rw-r--r--src/mainboard/supermicro/x9sae/devicetree.cb1
-rw-r--r--src/mainboard/supermicro/x9sae/early_init.c9
-rw-r--r--src/mainboard/supermicro/x9scl/devicetree.cb1
-rw-r--r--src/mainboard/supermicro/x9scl/early_init.c10
4 files changed, 2 insertions, 19 deletions
diff --git a/src/mainboard/supermicro/x9sae/devicetree.cb b/src/mainboard/supermicro/x9sae/devicetree.cb
index 12cbbaff3b..f5183819d1 100644
--- a/src/mainboard/supermicro/x9sae/devicetree.cb
+++ b/src/mainboard/supermicro/x9sae/devicetree.cb
@@ -6,6 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_power_cycle_delay" = "4"
+ register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
device domain 0 on
subsystemid 0x15d9 0x0644 inherit
diff --git a/src/mainboard/supermicro/x9sae/early_init.c b/src/mainboard/supermicro/x9sae/early_init.c
index 7e032120bc..5966b6607d 100644
--- a/src/mainboard/supermicro/x9sae/early_init.c
+++ b/src/mainboard/supermicro/x9sae/early_init.c
@@ -2,7 +2,6 @@
#include <bootblock_common.h>
#include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>
@@ -52,11 +51,3 @@ void bootblock_mainboard_early_init(void)
/* Enable UART */
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
- read_spd(&spd[0], 0x50, id_only);
- read_spd(&spd[1], 0x51, id_only);
- read_spd(&spd[2], 0x52, id_only);
- read_spd(&spd[3], 0x53, id_only);
-}
diff --git a/src/mainboard/supermicro/x9scl/devicetree.cb b/src/mainboard/supermicro/x9scl/devicetree.cb
index e20aac28c2..203a7a64ee 100644
--- a/src/mainboard/supermicro/x9scl/devicetree.cb
+++ b/src/mainboard/supermicro/x9scl/devicetree.cb
@@ -1,4 +1,5 @@
chip northbridge/intel/sandybridge
+ register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
device domain 0 on
subsystemid 0x15d9 0x0624 inherit
device ref host_bridge on end # Host bridge
diff --git a/src/mainboard/supermicro/x9scl/early_init.c b/src/mainboard/supermicro/x9scl/early_init.c
index 9438a51420..288666654d 100644
--- a/src/mainboard/supermicro/x9scl/early_init.c
+++ b/src/mainboard/supermicro/x9scl/early_init.c
@@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <stdint.h>
#include <device/pci_ops.h>
#include <device/pnp_def.h>
#include <device/pnp_ops.h>
#include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>
@@ -103,14 +101,6 @@ void bootblock_mainboard_early_init(void)
bmc_init();
}
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
- read_spd(&spd[0], 0x50, id_only);
- read_spd(&spd[1], 0x51, id_only);
- read_spd(&spd[2], 0x52, id_only);
- read_spd(&spd[3], 0x53, id_only);
-}
-
void mainboard_early_init(int s3resume)
{
/* Disable IGD VGA decode, no GTT or GFX stolen */