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-rw-r--r--src/mainboard/supermicro/h8qgi/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index ea4ed8eeff..acb05ab665 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -26,6 +26,7 @@
#include <arch/stages.h>
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
+#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "northbridge/amd/agesa/family10/reset_test.h"
#include <nb_cimx.h>
@@ -33,7 +34,6 @@
#include "superio/nuvoton/wpcm450/wpcm450.h"
#include "superio/winbond/w83627dhg/w83627dhg.h"
-extern void disable_cache_as_ram(void); /* cache_as_ram.inc */
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{