diff options
Diffstat (limited to 'src/mainboard/supermicro/h8dmr_fam10')
-rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c | 2 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/romstage.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c index 0a1e816f23..6279d9c060 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c +++ b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c @@ -69,7 +69,7 @@ void get_bus_conf(void) } /*I/O APICs: APIC ID Version State Address*/ - if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) + if (CONFIG(LOGICAL_CPUS)) apicid_base = get_apicid_base(1); else apicid_base = CONFIG_MAX_PHYSICAL_CPUS; diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index d688cc95de..1d6410dcd6 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -169,7 +169,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ wait_all_core0_started(); -#if IS_ENABLED(CONFIG_LOGICAL_CPUS) +#if CONFIG(LOGICAL_CPUS) /* Core0 on each node is configured. Now setup any additional cores. */ printk(BIOS_DEBUG, "start_other_cores()\n"); start_other_cores(bsp_apicid); @@ -179,7 +179,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x38); -#if IS_ENABLED(CONFIG_SET_FIDVID) +#if CONFIG(SET_FIDVID) msr = rdmsr(MSR_COFVID_STS); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); |