diff options
Diffstat (limited to 'src/mainboard/supermicro/h8dmr_fam10/romstage.c')
-rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/romstage.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index 1221f38f5c..068e27f16d 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -19,9 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define ASSEMBLY 1 - - #define RAMINIT_SYSINFO 1 #define FAM10_SCAN_PCI_BUS 0 @@ -70,7 +67,6 @@ #include "cpu/amd/mtrr/amd_earlymtrr.c" - #include "northbridge/amd/amdfam10/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -126,7 +122,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdfam10/early_ht.c" - static void sio_setup(void) { @@ -194,7 +189,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); printk(BIOS_DEBUG, "\n"); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); @@ -293,7 +287,6 @@ post_code(0x3E); post_code(0x40); - printk(BIOS_DEBUG, "raminit_amdmct()\n"); raminit_amdmct(sysinfo); post_code(0x41); |