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Diffstat (limited to 'src/mainboard/starlabs/lite/variants')
-rw-r--r--src/mainboard/starlabs/lite/variants/glk/devicetree.cb6
-rw-r--r--src/mainboard/starlabs/lite/variants/glkr/devicetree.cb6
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
index 6c0269b9e4..c22133b971 100644
--- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb
@@ -76,15 +76,15 @@ chip soc/intel/apollolake
register "sata_ports_enable[0]" = "1"
end
device ref xhci on
- # Motherboard USB Type C
+ # Motherboard USB 3.0 Type-C
register "usb2_port[0]" = "PORT_EN(OC_SKIP)"
register "usb3_port[1]" = "PORT_EN(OC_SKIP)"
- # Motherboard USB 3.0
+ # Motherboard USB 3.0 Type-A
register "usb2_port[3]" = "PORT_EN(OC1)"
register "usb3_port[0]" = "PORT_EN(OC1)"
- # Daughterboard USB 3.0
+ # Daughterboard USB 3.0 Type-A
register "usb2_port[5]" = "PORT_EN(OC_SKIP)"
register "usb3_port[4]" = "PORT_EN(OC_SKIP)"
diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
index bfe9d51a5a..4c79364592 100644
--- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
+++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
@@ -76,15 +76,15 @@ chip soc/intel/apollolake
register "sata_ports_enable[0]" = "1"
end
device ref xhci on
- # Motherboard USB Type C
+ # Motherboard USB 3.0 Type-C
register "usb2_port[0]" = "PORT_EN(OC1)"
register "usb3_port[0]" = "PORT_EN(OC1)"
- # Motherboard USB 3.0
+ # Motherboard USB 3.0 Type-A
register "usb2_port[1]" = "PORT_EN(OC0)"
register "usb3_port[1]" = "PORT_EN(OC0)"
- # Daughterboard USB 3.0
+ # Daughterboard USB 3.0 Type-A
register "usb2_port[3]" = "PORT_EN(OC1)"
register "usb3_port[4]" = "PORT_EN(OC1)"