diff options
Diffstat (limited to 'src/mainboard/starlabs/labtop')
46 files changed, 0 insertions, 3500 deletions
diff --git a/src/mainboard/starlabs/labtop/Kconfig b/src/mainboard/starlabs/labtop/Kconfig deleted file mode 100644 index e046648f3b..0000000000 --- a/src/mainboard/starlabs/labtop/Kconfig +++ /dev/null @@ -1,131 +0,0 @@ -config BOARD_STARLABS_LABTOP_SERIES - def_bool n - select DRIVERS_I2C_HID - select EC_STARLABS_ITE - select EC_STARLABS_FAN - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - select HAVE_CMOS_DEFAULT - select HAVE_OPTION_TABLE - select INTEL_GMA_HAVE_VBT - select INTEL_LPSS_UART_FOR_CONSOLE - select NO_UART_ON_SUPERIO - select SOC_INTEL_COMMON_BLOCK_HDA_VERB - select SYSTEM_TYPE_LAPTOP - -config BOARD_STARLABS_LABTOP_KBL - select BOARD_ROMSIZE_KB_8192 - select BOARD_STARLABS_LABTOP_SERIES - select HAVE_INTEL_PTT - select HAVE_SPD_IN_CBFS - select MAINBOARD_HAS_LIBGFXINIT - select SOC_INTEL_KABYLAKE - select SPI_FLASH_GIGADEVICE - -config BOARD_STARLABS_LABTOP_CML - select BOARD_ROMSIZE_KB_16384 - select BOARD_STARLABS_LABTOP_SERIES - select EC_STARLABS_MAX_CHARGE - select EC_STARLABS_NEED_ITE_BIN - select HAVE_INTEL_PTT - select HAVE_SPD_IN_CBFS - select CRB_TPM - select MAINBOARD_HAS_LIBGFXINIT - select MAINBOARD_HAS_TPM2 - select SOC_INTEL_COMETLAKE_1 - select SPI_FLASH_WINBOND - -config BOARD_STARLABS_STARBOOK_TGL - select BOARD_ROMSIZE_KB_16384 - select BOARD_STARLABS_LABTOP_SERIES - select DRIVERS_INTEL_USB4_RETIMER - select EC_STARLABS_KBL_LEVELS - select EC_STARLABS_MAX_CHARGE - select EC_STARLABS_NEED_ITE_BIN - select MEMORY_MAPPED_TPM - select MAINBOARD_HAS_TPM2 - select PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G - select SOC_INTEL_COMMON_BLOCK_TCSS - select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES - select SOC_INTEL_TIGERLAKE - select SOC_INTEL_TIGERLAKE_S3 - select SPI_FLASH_WINBOND - -if BOARD_STARLABS_LABTOP_SERIES - -config CCD_PORT - int - default 6 if BOARD_STARLABS_LABTOP_CML - default 3 - -config DEVICETREE - default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" - -config DIMM_SPD_SIZE - default 512 if BOARD_STARLABS_LABTOP_KBL - -config DRIVER_TPM_SPI_CHIP - default 2 - -config EC_GPE_SCI - default 0x6e if BOARD_STARLABS_STARBOOK_TGL - default 0x50 - -config EC_STARLABS_ADD_ITE_BIN - default y - -config EC_STARLABS_ITE_BIN_PATH - string - depends on EC_STARLABS_NEED_ITE_BIN - default "3rdparty/blobs/mainboard/starlabs/starbook/\$(CONFIG_VARIANT_DIR)/ec.bin" - -config EC_VARIANT_DIR - default "kbl" if !EC_STARLABS_MERLIN && BOARD_STARLABS_LABTOP_KBL - default "cml" if !EC_STARLABS_MERLIN && BOARD_STARLABS_LABTOP_CML - default "tgl" if !EC_STARLABS_MERLIN && BOARD_STARLABS_STARBOOK_TGL - -config FMDFILE - default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd" - -config IFD_BIN_PATH - string - default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/flashdescriptor.bin" - -config MAINBOARD_DIR - default "starlabs/labtop" - -config MAINBOARD_FAMILY - string - default "L3" if BOARD_STARLABS_LABTOP_KBL - default "L4" if BOARD_STARLABS_LABTOP_CML - default "B5" if BOARD_STARLABS_STARBOOK_TGL - -config MAINBOARD_PART_NUMBER - default "LabTop Mk III" if BOARD_STARLABS_LABTOP_KBL - default "LabTop Mk IV" if BOARD_STARLABS_LABTOP_CML - default "StarBook Mk V" if BOARD_STARLABS_STARBOOK_TGL - -config MAINBOARD_SMBIOS_PRODUCT_NAME - default "StarBook" if BOARD_STARLABS_STARBOOK_TGL - default "LabTop" - -config ME_BIN_PATH - string - default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/\$(CONFIG_VARIANT_DIR)/intel_me.bin" - -config TIANOCORE_BOOTSPLASH_FILE - string - default "3rdparty/blobs/mainboard/starlabs/Logo.bmp" - -config UART_FOR_CONSOLE - default 2 - -config USE_PM_ACPI_TIMER - default n if BOARD_STARLABS_STARBOOK_TGL - -config VARIANT_DIR - default "kbl" if BOARD_STARLABS_LABTOP_KBL - default "cml" if BOARD_STARLABS_LABTOP_CML - default "tgl" if BOARD_STARLABS_STARBOOK_TGL - -endif diff --git a/src/mainboard/starlabs/labtop/Kconfig.name b/src/mainboard/starlabs/labtop/Kconfig.name deleted file mode 100644 index e1583d49c4..0000000000 --- a/src/mainboard/starlabs/labtop/Kconfig.name +++ /dev/null @@ -1,10 +0,0 @@ -comment "Star Labs LabTop Series" - -config BOARD_STARLABS_LABTOP_KBL - bool "Star Labs LabTop Mk III (i7-8550u)" - -config BOARD_STARLABS_LABTOP_CML - bool "Star Labs LabTop Mk IV (i3-10110U and i7-10710U)" - -config BOARD_STARLABS_STARBOOK_TGL - bool "Star Labs StarBook Mk V (i3-1115G4 and i7-1165G7)" diff --git a/src/mainboard/starlabs/labtop/Makefile.inc b/src/mainboard/starlabs/labtop/Makefile.inc deleted file mode 100644 index dc26be0afa..0000000000 --- a/src/mainboard/starlabs/labtop/Makefile.inc +++ /dev/null @@ -1,12 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include -subdirs-$(CONFIG_HAVE_SPD_IN_CBFS) += ./spd -subdirs-y += variants/$(VARIANT_DIR) - -bootblock-y += bootblock.c - -ramstage-y += hda_verb.c -ramstage-y += mainboard.c -ramstage-y += smbios.c -ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads diff --git a/src/mainboard/starlabs/labtop/acpi/ec.asl b/src/mainboard/starlabs/labtop/acpi/ec.asl deleted file mode 100644 index 853b0877b3..0000000000 --- a/src/mainboard/starlabs/labtop/acpi/ec.asl +++ /dev/null @@ -1 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ diff --git a/src/mainboard/starlabs/labtop/acpi/mainboard.asl b/src/mainboard/starlabs/labtop/acpi/mainboard.asl deleted file mode 100644 index 5bdde36bb7..0000000000 --- a/src/mainboard/starlabs/labtop/acpi/mainboard.asl +++ /dev/null @@ -1,34 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -Scope (\_SB) { - #include "sleep.asl" -} - -/* - * This platform doesn't support SoundWire but there - * is a kernel bug in some 5.10.x releases. - * - * Debian testing live CD (at 4th Feb 2021) uses 5.10.9-1. More - * details can be found at https://bit.ly/3ttdffG but it appears to - * be triggered by missing SoundWire ACPI entries. - * - * Add the minimal set to make it work again. - */ -Scope (_SB.PCI0.HDAS) -{ - Device (SNDW) - { - Name (_ADR, 0x40000000) - - Name (_CID, Package (0x02) - { - "PRP0001", - "PNP0A05" - }) - - Method (_STA, 0, NotSerialized) - { - Return (0x0B) - } - } -} diff --git a/src/mainboard/starlabs/labtop/acpi/sleep.asl b/src/mainboard/starlabs/labtop/acpi/sleep.asl deleted file mode 100644 index 78a2d290db..0000000000 --- a/src/mainboard/starlabs/labtop/acpi/sleep.asl +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -Method (MPTS, 1, NotSerialized) -{ -#if CONFIG(BOARD_STARLABS_STARBOOK_TGL) - If (Arg0 == 0x03) { - \_SB.PCI0.CTXS (GPP_D16) - } -#endif - - RPTS (Arg0) -} - -Method (MWAK, 1, NotSerialized) -{ - RWAK (Arg0) -} diff --git a/src/mainboard/starlabs/labtop/acpi/superio.asl b/src/mainboard/starlabs/labtop/acpi/superio.asl deleted file mode 100644 index 853b0877b3..0000000000 --- a/src/mainboard/starlabs/labtop/acpi/superio.asl +++ /dev/null @@ -1 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ diff --git a/src/mainboard/starlabs/labtop/board_info.txt b/src/mainboard/starlabs/labtop/board_info.txt deleted file mode 100644 index 9e70dba3d6..0000000000 --- a/src/mainboard/starlabs/labtop/board_info.txt +++ /dev/null @@ -1,6 +0,0 @@ -Vendor name: Star Labs -Board name: LabTop -Category: laptop -ROM protocol: SPI -ROM socketed: n -Flashrom support: y diff --git a/src/mainboard/starlabs/labtop/bootblock.c b/src/mainboard/starlabs/labtop/bootblock.c deleted file mode 100644 index ca48bb1ab2..0000000000 --- a/src/mainboard/starlabs/labtop/bootblock.c +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <bootblock_common.h> -#include <soc/gpio.h> -#include <variants.h> - -void bootblock_mainboard_init(void) -{ - const struct pad_config *pads; - size_t num; - - pads = variant_early_gpio_table(&num); - gpio_configure_pads(pads, num); -} diff --git a/src/mainboard/starlabs/labtop/cmos.default b/src/mainboard/starlabs/labtop/cmos.default deleted file mode 100644 index 0783adf403..0000000000 --- a/src/mainboard/starlabs/labtop/cmos.default +++ /dev/null @@ -1,27 +0,0 @@ -# hardcoded -boot_option=Fallback -# console -debug_level=Debug -# cpu -hyper_threading=Enable -vtd=Enable -power_profile=Balanced -me_state=Disable -smi_handler=Enable -# Devices -wireless=Enable -webcam=Enable -microphone=Enable -legacy_8254_timer=Disable -usb_always_on=Disable -thunderbolt=Disable -# EC -kbl_timeout=30 seconds -fn_ctrl_swap=Disable -# southbridge -power_on_after_fail=Disable -# Functions -fn_lock_state=0x1 -trackpad_state=0x1 -kbl_brightness=0x0 -kbl_state=0x1 diff --git a/src/mainboard/starlabs/labtop/cmos.layout b/src/mainboard/starlabs/labtop/cmos.layout deleted file mode 100644 index 85ec47772c..0000000000 --- a/src/mainboard/starlabs/labtop/cmos.layout +++ /dev/null @@ -1,108 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -# ----------------------------------------------------------------- -entries - -# Bank: 1 -# ----------------------------------------------------------------- -0 120 r 0 reserved_memory - -# ----------------------------------------------------------------- -# RTC_BOOT_BYTE (coreboot hardcoded) -384 1 e 2 boot_option -388 4 h 0 reboot_counter - -# ----------------------------------------------------------------- -# coreboot config options: console -395 4 e 3 debug_level -# coreboot config options: cpu -#400 8 r 0 reserved for century byte -408 1 e 1 hyper_threading -416 1 e 1 vtd -424 2 e 7 power_profile -432 1 e 5 me_state -440 4 h 0 me_state_counter -448 1 e 1 smi_handler - -# coreboot config options: Devices -504 1 e 1 wireless -512 1 e 1 webcam -520 1 e 1 microphone -528 1 e 1 legacy_8254_timer -536 1 e 1 usb_always_on -544 1 e 1 thunderbolt - -# coreboot config options: EC -600 3 e 4 kbl_timeout -608 1 e 1 fn_ctrl_swap -616 2 e 8 max_charge -624 2 e 9 fan_mode - -# coreboot config options: southbridge -800 2 e 6 power_on_after_fail - -# coreboot config options: check sums -984 16 h 0 check_sum - -# Bank: 2 -# embedded controller settings (outside the checksummed area) -1024 8 h 1 fn_lock_state -1032 8 h 1 trackpad_state -1040 8 h 10 kbl_brightness -1048 8 h 1 kbl_state - -# ----------------------------------------------------------------- - -enumerations - -#ID value text -1 0 Disable -1 1 Enable - -2 0 Fallback -2 1 Normal - -3 0 Emergency -3 1 Alert -3 2 Critical -3 3 Error -3 4 Warning -3 5 Notice -3 6 Info -3 7 Debug -3 8 Spew - -4 0 30 seconds -4 1 1 minute -4 2 3 minutes -4 3 5 minutes -4 4 Never - -5 0 Enable -5 1 Disable - -6 0 Disable -6 1 Enable -6 2 Keep - -7 0 Power Saver -7 1 Balanced -7 2 Performance - -8 0 100% -8 1 80% -8 2 60% - -9 0 Normal -9 1 Aggressive -9 2 Quiet - -10 0 Off -10 1 Low -10 2 High -10 3 On - -# ----------------------------------------------------------------- -checksums - -checksum 392 983 984 diff --git a/src/mainboard/starlabs/labtop/dsdt.asl b/src/mainboard/starlabs/labtop/dsdt.asl deleted file mode 100644 index bee42358db..0000000000 --- a/src/mainboard/starlabs/labtop/dsdt.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi.h> -DefinitionBlock( - "dsdt.aml", - "DSDT", - ACPI_DSDT_REV_2, - OEM_ID, - ACPI_TABLE_CREATOR, - 0x20110725 -) -{ - #include <acpi/dsdt_top.asl> - #include <soc/intel/common/block/acpi/acpi/platform.asl> - #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> - #include <cpu/intel/common/acpi/cpu.asl> - - Device (\_SB.PCI0) - { -#if CONFIG(SOC_INTEL_COMMON_SKYLAKE_BASE) - /* Kaby Lake */ - #include <soc/intel/skylake/acpi/systemagent.asl> - #include <soc/intel/skylake/acpi/pch.asl> -#elif CONFIG(SOC_INTEL_CANNONLAKE_BASE) - /* Comet Lake */ - #include <soc/intel/common/block/acpi/acpi/northbridge.asl> - #include <soc/intel/cannonlake/acpi/southbridge.asl> -#elif CONFIG(SOC_INTEL_TIGERLAKE) - /* Tiger Lake */ - #include <soc/intel/common/block/acpi/acpi/northbridge.asl> - #include <soc/intel/tigerlake/acpi/southbridge.asl> - #include <soc/intel/tigerlake/acpi/tcss.asl> -#endif - - /* PS/2 Keyboard */ - #include <drivers/pc80/pc/ps2_controller.asl> - } - - #include <southbridge/intel/common/acpi/sleepstates.asl> - - /* Star Labs EC */ - #include <ec/starlabs/merlin/acpi/ec.asl> - - Scope (\_SB) - { - /* HID Driver */ - #include <ec/starlabs/merlin/acpi/hid.asl> - - /* Suspend Methods */ - #include <ec/starlabs/merlin/acpi/suspend.asl> - } - - #include "acpi/mainboard.asl" -} diff --git a/src/mainboard/starlabs/labtop/hda_verb.c b/src/mainboard/starlabs/labtop/hda_verb.c deleted file mode 100644 index 371ab5d5f7..0000000000 --- a/src/mainboard/starlabs/labtop/hda_verb.c +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <device/azalia_device.h> -#include <option.h> -#include <types.h> - -#define AZALIA_CODEC_ALC256 0x10ec0256 -#define AZALIA_CODEC_ALC269 0x10ec0269 - -static const u32 override_verb[] = { - AZALIA_PIN_CFG(0, 0x12, 0x411111f0), -}; - -static void disable_microphone(u8 *base) -{ - azalia_program_verb_table(base, override_verb, ARRAY_SIZE(override_verb)); -} - -void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid) -{ - if (viddid == AZALIA_CODEC_ALC256 || viddid == AZALIA_CODEC_ALC269) { - printk(BIOS_DEBUG, "CMOS: viddid = %08x\n", viddid); - if (get_uint_option("microphone", 1) == 0) - disable_microphone(base); - } -} diff --git a/src/mainboard/starlabs/labtop/include/variants.h b/src/mainboard/starlabs/labtop/include/variants.h deleted file mode 100644 index 0dd41c062c..0000000000 --- a/src/mainboard/starlabs/labtop/include/variants.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _BASEBOARD_VARIANTS_H_ -#define _BASEBOARD_VARIANTS_H_ - -#include <soc/gpio.h> - -enum cmos_power_profile { - PP_POWER_SAVER = 0, - PP_BALANCED = 1, - PP_PERFORMANCE = 2, -}; -#define NUM_POWER_PROFILES 3 - -enum cmos_power_profile get_power_profile(enum cmos_power_profile fallback); - -/* - * The next set of functions return the gpio table and fill in the number of - * entries for each table. - */ -const struct pad_config *variant_gpio_table(size_t *num); -const struct pad_config *variant_early_gpio_table(size_t *num); - -void devtree_update(void); - -#endif /* _BASEBOARD_VARIANTS_H_ */ diff --git a/src/mainboard/starlabs/labtop/mainboard.c b/src/mainboard/starlabs/labtop/mainboard.c deleted file mode 100644 index d394f2579d..0000000000 --- a/src/mainboard/starlabs/labtop/mainboard.c +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/device.h> -#include <soc/ramstage.h> -#include <option.h> -#include <variants.h> - -enum cmos_power_profile get_power_profile(enum cmos_power_profile fallback) -{ - const unsigned int power_profile = get_uint_option("power_profile", fallback); - return power_profile < NUM_POWER_PROFILES ? power_profile : fallback; -} - -static void init_mainboard(void *chip_info) -{ - const struct pad_config *pads; - size_t num; - - pads = variant_gpio_table(&num); - gpio_configure_pads(pads, num); - - devtree_update(); -} - -struct chip_operations mainboard_ops = { - .init = init_mainboard, -}; diff --git a/src/mainboard/starlabs/labtop/smbios.c b/src/mainboard/starlabs/labtop/smbios.c deleted file mode 100644 index fbdbefd361..0000000000 --- a/src/mainboard/starlabs/labtop/smbios.c +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <chip.h> -#include <device/device.h> -#include <device/pci_def.h> -#include <ec/starlabs/merlin/ec.h> -#include <smbios.h> -#include <types.h> -#include <uuid.h> -#include <variants.h> - -const char *smbios_mainboard_bios_version(void) -{ - return "8"; -} - -/* Get the Embedded Controller firmware version */ -void smbios_ec_revision(uint8_t *ec_major_revision, uint8_t *ec_minor_revision) -{ - u16 ec_version = ec_get_version(); - - *ec_major_revision = ec_version >> 8; - *ec_minor_revision = ec_version & 0xff; -} - -const char *smbios_system_sku(void) -{ - return CONFIG_MAINBOARD_FAMILY; -} - -u8 smbios_mainboard_feature_flags(void) -{ - return SMBIOS_FEATURE_FLAGS_HOSTING_BOARD | SMBIOS_FEATURE_FLAGS_REPLACEABLE; -} - -const char *smbios_chassis_version(void) -{ - return smbios_mainboard_version(); -} - -const char *smbios_chassis_serial_number(void) -{ - return smbios_mainboard_serial_number(); -} diff --git a/src/mainboard/starlabs/labtop/spd/Makefile.inc b/src/mainboard/starlabs/labtop/spd/Makefile.inc deleted file mode 100644 index 9e7f4e377e..0000000000 --- a/src/mainboard/starlabs/labtop/spd/Makefile.inc +++ /dev/null @@ -1,21 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -# Schematics for this platform show Samsung K4A8G165WB-BCRC devices -# which are 8Gb, 2400Mbps 512Mx16 devices. -# -# The hardware platforms used for testing are fitted with a Micron part -# which has the FBGA identifier "D9ZFW". The identification tool at -# https://www.micron.com/support/tools-and-utilities/fbga identifies -# this as the MT40A1G16KD-062E:E. These are 16Gb, 1Gx16 devices. -# -# We have defined both SPD options below. -SPD_SOURCES = empty_ddr4 # 0b0000 -SPD_SOURCES += micron-MT40A1G16KD-062E-E # 0b0001 -SPD_SOURCES += empty_ddr4 # 0b0010 -SPD_SOURCES += empty_ddr4 # 0b0011 -SPD_SOURCES += empty_ddr4 # 0b0100 -SPD_SOURCES += empty_ddr4 # 0b0101 -SPD_SOURCES += samsung-K4A8G165WB-BCRC # 0b0110 -SPD_SOURCES += samsung-K4A8G165WB-BCRC # 0b0111 - -LIB_SPD_DEPS = $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) diff --git a/src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex b/src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex deleted file mode 100644 index 67b46cd239..0000000000 --- a/src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex +++ /dev/null @@ -1,32 +0,0 @@ -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex b/src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex deleted file mode 100644 index 17778473af..0000000000 --- a/src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex +++ /dev/null @@ -1,33 +0,0 @@ -# Micron MT40A1G16KD-062E:E -23 11 0C 03 46 29 00 08 00 60 00 03 02 03 00 00 -00 00 05 0D F8 FF 2B 00 6E 6E 6E 11 00 6E F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 00 00 00 00 E7 00 7C A0 -0F 01 1F 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 21 7D -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -80 2C 00 00 00 00 00 00 00 4D 54 34 30 41 31 47 -31 36 4B 44 2D 30 36 32 45 3A 45 20 20 31 80 2C -45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex b/src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex deleted file mode 100644 index 36b85a2035..0000000000 --- a/src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex +++ /dev/null @@ -1,33 +0,0 @@ -# K4A8G165WB-BCRC -23 11 0C 03 45 21 00 08 00 60 00 03 02 03 00 00 -00 00 07 0D F8 0F 00 00 6E 6E 6E 11 00 6E F0 0A -20 08 00 05 00 F0 2B 34 28 00 78 00 14 3C 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 16 36 0B 35 -16 36 0B 35 00 00 16 36 0B 35 16 36 0B 35 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 9C B5 00 00 00 00 E7 D6 0B E3 -0F 11 02 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 DB 08 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -80 CE 00 00 00 00 00 00 00 4D 34 37 31 41 35 32 -34 34 42 42 30 2D 43 52 43 20 20 20 20 00 80 CE -FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/starlabs/labtop/variants/cml/Makefile.inc b/src/mainboard/starlabs/labtop/variants/cml/Makefile.inc deleted file mode 100644 index 2a505c35c7..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -bootblock-y += gpio.c - -romstage-y += romstage.c - -ramstage-y += devtree.c -ramstage-y += gpio.c -ramstage-y += hda_verb.c diff --git a/src/mainboard/starlabs/labtop/variants/cml/board.fmd b/src/mainboard/starlabs/labtop/variants/cml/board.fmd deleted file mode 100644 index 9018104edd..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/board.fmd +++ /dev/null @@ -1,14 +0,0 @@ -# -# Manually defined FMD in order to ensure that space is reserved for the EC -# at the top of the BIOS region. -# -FLASH 16M { - BIOS@0x400000 0xC00000 { - EC@0x0 0x20000 - RW_MRC_CACHE@0x20000 0x10000 - SMMSTORE@0x30000 0x40000 - CONSOLE@0x70000 0x20000 - FMAP@0x90000 0x200 - COREBOOT(CBFS) - } -} diff --git a/src/mainboard/starlabs/labtop/variants/cml/data.vbt b/src/mainboard/starlabs/labtop/variants/cml/data.vbt Binary files differdeleted file mode 100644 index 4b31c96aad..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/data.vbt +++ /dev/null diff --git a/src/mainboard/starlabs/labtop/variants/cml/devicetree.cb b/src/mainboard/starlabs/labtop/variants/cml/devicetree.cb deleted file mode 100644 index 1d98612e33..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/devicetree.cb +++ /dev/null @@ -1,190 +0,0 @@ -chip soc/intel/cannonlake - # CPU - # Enable Enhanced Intel SpeedStep - register "eist_enable" = "1" - - # Graphics - # IGD Displays - register "panel_cfg" = "{ - .up_delay_ms = 0, // T3 - .backlight_on_delay_ms = 0, // T7 - .backlight_off_delay_ms = 0, // T9 - .down_delay_ms = 0, // T10 - .cycle_delay_ms = 500, // T12 - .backlight_pwm_hz = 200, // PWM - }" - - # FSP Memory - register "enable_c6dram" = "1" - register "SaGv" = "SaGv_Enabled" - - # FSP Silicon - # Serial I/O - register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoPci, - [PchSerialIoIndexI2C4] = PchSerialIoSkipInit, - [PchSerialIoIndexUART2] = PchSerialIoSkipInit, - }" - - # Power - register "PchPmSlpS3MinAssert" = "2" # 50ms - register "PchPmSlpS4MinAssert" = "3" # 1s - register "PchPmSlpSusMinAssert" = "3" # 500ms - register "PchPmSlpAMinAssert" = "3" # 2s - - # PM Util - # GPE configuration - # Note that GPE events called out in ASL code rely on this - # route. i.e. If this route changes then the affected GPE - # offset bits also need to be changed. - # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG) - register "gpe0_dw0" = "PMC_GPP_B" - register "gpe0_dw1" = "PMC_GPP_C" - register "gpe0_dw2" = "PMC_GPP_E" - - # PCIe Clock - register "PcieClkSrcClkReq[0]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[2]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[3]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[4]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[5]" = "PCIE_CLK_NOTUSED" - -# Actual device tree. - device cpu_cluster 0 on - device lapic 0 on end - end - - device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 02.0 on end # Integrated Graphics Device - device pci 04.0 on # SA Thermal Device - register "Device4Enable" = "1" - end - device pci 12.0 off end # Thermal Subsystem - device pci 12.5 off end # UFS SCS - device pci 12.6 off end # GSPI #2 - device pci 14.0 on # USB xHCI - # Motherboard USB Type C - register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Motherboard USB 3.0 - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Daughterboard SD Card - register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" - - # Daughterboard USB 3.0 - register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Webcam - register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)" - - # Internal Bluetooth - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" - end - device pci 14.1 off end # USB xDCI (OTG) - device pci 14.3 on # CNVi - chip drivers/wifi/generic - register "wake" = "GPE0_PME_B0" - device generic 0 on end - end - end - device pci 14.5 off end # SDCard - device pci 15.0 on # I2C0 - chip drivers/i2c/hid - register "generic.hid" = ""STAR0001"" - register "generic.desc" = ""Touchpad"" - register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)" - register "generic.probed" = "1" - register "hid_desc_reg_offset" = "0x20" - device i2c 2c on end - end - end - device pci 15.1 off end # I2C1 - device pci 15.2 off end # I2C2 - device pci 15.3 off end # I2C3 - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT Redirection - device pci 16.4 off end # Management Engine Interface 3 - device pci 16.5 off end # Management Engine Interface 4 - device pci 17.0 on # SATA - register "SataSalpSupport" = "1" - # Port 1 - register "SataPortsEnable[1]" = "1" - register "SataPortsDevSlp[1]" = "1" - end - device pci 19.0 on end # I2C4 - device pci 19.1 off end # I2C5 - device pci 19.2 on end # UART #2 - device pci 1a.0 off end # eMMC - device pci 1c.0 off end # PCI Express Port 1 - device pci 1c.1 off end # PCI Express Port 2 - device pci 1c.2 off end # PCI Express Port 3 - device pci 1c.3 off end # PCI Express Port 4 - device pci 1c.4 off end # PCI Express Port 5 - device pci 1c.5 off end # PCI Express Port 6 - device pci 1c.6 off end # PCI Express Port 7 - device pci 1c.7 off end # PCI Express Port 8 - device pci 1d.0 on # PCI Express Port 9 (SSD x4) - register "PcieRpSlotImplemented[8]" = "1" - register "PcieRpEnable[8]" = "1" - register "PcieRpLtrEnable[8]" = "1" - register "PcieClkSrcUsage[1]" = "0x08" - register "PcieClkSrcClkReq[1]" = "1" - smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X" - end - device pci 1d.1 off end # PCI Express Port 10 - device pci 1d.2 off end # PCI Express Port 11 - device pci 1d.3 off end # PCI Express Port 12 - device pci 1e.0 off end # UART #0 - device pci 1e.1 off end # UART #1 - device pci 1e.2 off end # GSPI #0 - device pci 1e.3 off end # GSPI #1 - device pci 1f.0 on # LPC Interface - register "gen1_dec" = "0x000c0681" - register "gen2_dec" = "0x000c1641" - register "gen3_dec" = "0x00fc0201" - register "gen4_dec" = "0x000c0081" - - chip ec/starlabs/merlin - # Port pair 4Eh/4Fh - device pnp 4e.00 on end # IO Interface - device pnp 4e.01 off end # Com 1 - device pnp 4e.02 off end # Com 2 - device pnp 4e.04 off end # System Wake-Up - device pnp 4e.05 off end # PS/2 Mouse - device pnp 4e.06 on # PS/2 Keyboard - io 0x60 = 0x0060 - io 0x62 = 0x0064 - irq 0x70 = 1 - end - device pnp 4e.0a off end # Consumer IR - device pnp 4e.0f off end # Shared Memory/Flash Interface - device pnp 4e.10 off end # RTC-like Timer - device pnp 4e.11 off end # Power Management Channel 1 - device pnp 4e.12 off end # Power Management Channel 2 - device pnp 4e.13 off end # Serial Peripheral Interface - device pnp 4e.14 off end # Platform EC Interface - device pnp 4e.17 off end # Power Management Channel 3 - device pnp 4e.18 off end # Power Management Channel 4 - device pnp 4e.19 off end # Power Management Channel 5 - end - end - device pci 1f.1 off end # P2SB - device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 on # Intel HDA - register "PchHdaAudioLinkHda" = "1" - end - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # PCH SPI - device pci 1f.6 off end # GbE - end - chip drivers/crb - device mmio 0xfed40000 on end - end -end diff --git a/src/mainboard/starlabs/labtop/variants/cml/devtree.c b/src/mainboard/starlabs/labtop/variants/cml/devtree.c deleted file mode 100644 index 95a5d44ea3..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/devtree.c +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <chip.h> -#include <cpu/intel/turbo.h> -#include <device/device.h> -#include <device/pci_def.h> -#include <option.h> -#include <types.h> -#include <variants.h> - -void devtree_update(void) -{ - config_t *cfg = config_of_soc(); - - struct soc_power_limits_config *soc_conf = &cfg->power_limits_config; - - struct device *nic_dev = pcidev_on_root(0x14, 3); - - /* Update PL1 & PL2 based on CMOS settings */ - switch (get_power_profile(PP_POWER_SAVER)) { - case PP_POWER_SAVER: - disable_turbo(); - soc_conf->tdp_pl1_override = 15; - soc_conf->tdp_pl2_override = 15; - cfg->tcc_offset = 20; - break; - case PP_BALANCED: - soc_conf->tdp_pl1_override = 17; - soc_conf->tdp_pl2_override = 20; - cfg->tcc_offset = 15; - break; - case PP_PERFORMANCE: - soc_conf->tdp_pl1_override = 20; - soc_conf->tdp_pl2_override = 25; - cfg->tcc_offset = 10; - break; - } - - /* Enable/Disable Wireless based on CMOS settings */ - if (get_uint_option("wireless", 1) == 0) - nic_dev->enabled = 0; - - /* Enable/Disable Webcam based on CMOS settings */ - cfg->usb2_ports[CONFIG_CCD_PORT].enable = get_uint_option("webcam", 1); -} diff --git a/src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads b/src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads deleted file mode 100644 index 8402b39a94..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads +++ /dev/null @@ -1,18 +0,0 @@ --- SPDX-License-Identifier: GPL-2.0-or-later - -with HW.GFX.GMA; -with HW.GFX.GMA.Display_Probing; - -use HW.GFX.GMA; -use HW.GFX.GMA.Display_Probing; - -private package GMA.Mainboard is - - ports : constant Port_List := - (DP1, -- USB-C - HDMI1, -- USB-C - HDMI2, -- HDMI - eDP, - others => Disabled); - -end GMA.Mainboard; diff --git a/src/mainboard/starlabs/labtop/variants/cml/gpio.c b/src/mainboard/starlabs/labtop/variants/cml/gpio.c deleted file mode 100644 index e29cd8199b..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/gpio.c +++ /dev/null @@ -1,414 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <variants.h> - -/* - * All definitions are taken from a comparison of the output of "inteltool -a" - * using the stock BIOS and with coreboot. - */ - -/* Early pad configuration in bootblock */ -const struct pad_config early_gpio_table[] = { - /* C20: UART2_RXD */ - PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), - /* C21: UART2_TXD */ - PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), - /* E22: BRD_ID0 */ - PAD_CFG_GPO(GPP_E22, 1, PLTRST), - /* E23: BRD_ID1 */ - PAD_CFG_GPO(GPP_E23, 1, PLTRST), - /* H6: BRD_ID2 */ - PAD_CFG_GPI(GPP_H6, NONE, PLTRST), - /* H7: BRD_ID3 */ - PAD_CFG_GPI(GPP_H7, NONE, PLTRST), -}; - -const struct pad_config *variant_early_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(early_gpio_table); - return early_gpio_table; -} - -/* Pad configuration in ramstage. */ -const struct pad_config gpio_table[] = { - /* REFERENCE: EP PER SCHEMATIC */ - - /* GPD0: PCH_BATLOW# */ - PAD_CFG_NF(GPD0, NONE, DEEP, NF1), - /* GPD1: AC_PRESENT */ - PAD_CFG_NF(GPD1, NONE, DEEP, NF1), - /* GPD2: LAN_WAKE# */ - PAD_NC(GPD2, NONE), - /* GPD3: SIO_PWRBTN# */ - PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), - /* GPD4: SIO_SLP_S3# */ - PAD_CFG_NF(GPD4, NONE, DEEP, NF1), - /* GPD5: SIO_SLP_S4# */ - PAD_CFG_NF(GPD5, NONE, DEEP, NF1), - /* GPD6: SIO_SLP_A# */ - PAD_CFG_NF(GPD6, NONE, DEEP, NF1), - /* GPD7: PCH_TBT_PERST# */ - PAD_CFG_GPO(GPD7, 0, PLTRST), - /* GPD8: SUSCLK */ - PAD_CFG_NF(GPD8, NONE, DEEP, NF1), - /* GPD9: SIO_SLP_WLAN# */ - PAD_CFG_NF(GPD9, NONE, DEEP, NF1), - /* GPD10: SIO_SLP_S5# */ - PAD_CFG_NF(GPD10, NONE, DEEP, NF1), - /* GPD11: PM_LANPHY_EN */ - PAD_CFG_NF(GPD11, NONE, DEEP, NF1), - - /* A0: KBRST_N */ - PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), - /* A1: LPC_AD0 */ - PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), - /* A2: LPC_AD1 */ - PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), - /* A3: LPC_AD2 */ - PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), - /* A4: LPC_AD3 */ - PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), - /* A5: LPC_FRAME_N */ - PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), - /* A6: LPC_SERIRQ */ - PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), - /* A7: Not Connected */ - PAD_NC(GPP_A7, NONE), - /* A8: GPPC_A8_CLKRUN_N */ - PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), - /* A9: ESPI_CLK */ - PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), - /* A10: Not Connected */ - PAD_NC(GPP_A10, NONE), - /* A11: Not Connected */ - PAD_NC(GPP_A11, NONE), - /* A12: TABLET_MODE_CTRL */ - PAD_NC(GPP_A12, NONE), - /* A13: SUSPWRDNACK */ - PAD_CFG_GPO(GPP_A13, 1, PLTRST), - /* A14: PM_SUS_STAT_N */ - PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1), - /* A15: SPK_PD_N */ - PAD_CFG_GPO(GPP_A15, 1, PLTRST), - /* A16: Not Connected */ - PAD_NC(GPP_A16, NONE), - /* A17: SAR_DPR_PCH */ - PAD_NC(GPP_A17, NONE), - /* A18: ACCEL1_INT1 */ - PAD_NC(GPP_A18, UP_20K), - /* A19: ACCEL2_INT1 */ - PAD_NC(GPP_A19, UP_20K), - /* A20: HUMAN_PRESENCE_INT_N */ - PAD_NC(GPP_A20, UP_20K), - /* A21: HALL_SENSOR_INT */ - PAD_NC(GPP_A21, UP_20K), - /* A22: SAR_NIRQ_PCH */ - PAD_NC(GPP_A22, UP_20K), - /* A23: INT_SHARED */ - PAD_NC(GPP_A23, UP_20K), - - /* B0: Not Connected */ - PAD_NC(GPP_B0, NONE), - /* B1: Not Connected */ - PAD_NC(GPP_B1, NONE), - /* B2: Not Connected */ - PAD_NC(GPP_B2, NONE), - /* B3: CLICK_PAD_INT_R_N */ - PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST), - /* B4: BT_RF_KILL_N */ - PAD_CFG_GPO(GPP_B4, 1, DEEP), - /* B5: WLAN_CLKREQ# */ - PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), - /* B6: CLKREQ1_SSD_N */ - PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), - /* B7: LAN_CLKREQ# */ - PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), - /* B8: Not Connected */ - PAD_NC(GPP_B8, NONE), - /* B9: Not Connected */ - PAD_NC(GPP_B9, NONE), - /* B10: Not Connected */ - PAD_NC(GPP_B10, NONE), - /* B11: EXT_PWR_GATE_N */ - PAD_CFG_GPO(GPP_B11, 1, PLTRST), - /* B12: PM_SLP_S0_N */ - PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), - /* B13: PLT_RST_N */ - PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), - /* B14: TCH_PNL_PWR_EN */ - PAD_CFG_GPO(GPP_B14, 1, PLTRST), - /* B15: Not Connected */ - PAD_NC(GPP_B15, NONE), - /* B16: FPS_INT */ - PAD_CFG_GPI_APIC(GPP_B16, NONE, PLTRST, LEVEL, NONE), - /* B17: FPS_RST_N */ - PAD_CFG_GPO(GPP_B17, 1, PLTRST), - /* B18: AR_CIO_PWR_EN */ - PAD_CFG_GPO(GPP_B18, 0, DEEP), - /* B19: GSPI1_CS0_FPS_N */ - PAD_NC(GPP_B19, NONE), - /* B20: GSPI1_CLK_FPS */ - PAD_NC(GPP_B20, NONE), - /* B21: GSPI1_MISO_FPS */ - PAD_NC(GPP_B21, NONE), - /* B22: GSPI1_MOSI_FPS */ - PAD_CFG_GPO(GPP_B22, 0, DEEP), - /* B23: EC_SLP_S0IX_N */ - PAD_NC(GPP_B23, NONE), - - /* C0: SMB_CLK */ - PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), - /* C1: SMB_DATA */ - PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), - /* C2: WIFI_RF_KILL_N */ - PAD_CFG_GPO(GPP_C2, 1, DEEP), - /* C3: Not Connected */ - PAD_NC(GPP_C3, NONE), - /* C4: Not Connected */ - PAD_NC(GPP_C4, NONE), - /* C5: SML0ALERT */ - PAD_CFG_GPO(GPP_C5, 0, DEEP), - /* C6: Not Connected */ - PAD_NC(GPP_C6, NONE), - /* C7: Not Connected */ - PAD_NC(GPP_C7, NONE), - /* C8: CODEC_INT_N */ - PAD_CFG_GPI_APIC_LOW(GPP_C8, UP_20K, PLTRST), - /* C9: Not Connected */ - PAD_NC(GPP_C9, NONE), - /* C10: Not Connected */ - PAD_NC(GPP_C10, NONE), - /* C11: Not Connected */ - PAD_NC(GPP_C11, NONE), - /* C12: PCIE_NAND_RST_R_N */ - PAD_CFG_GPO(GPP_C12, 1, PLTRST), - /* C13: M2_SSD_PWREN */ - PAD_NC(GPP_C13, NONE), - /* C14: TBT_WAKE_MUX_SEL_N */ - PAD_NC(GPP_C14, NONE), - /* C15: TBT_RST_N */ - PAD_NC(GPP_C15, NONE), - /* C16: I2C0_SDA */ - PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), - /* C17: I2C0_SCL */ - PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), - /* C18: TOUCH_I2C_SDA */ - PAD_NC(GPP_C18, NONE), - /* C19: TOUCH_I2C_SDL */ - PAD_NC(GPP_C19, NONE), - /* C22: AR1_USB_PWR_EN */ - PAD_NC(GPP_C22, NONE), - /* C23: Not Connected */ - PAD_NC(GPP_C23, NONE), - - /* D0: TPM_IRQ */ - PAD_NC(GPP_D0, NONE), - /* D1: Not Connected */ - PAD_NC(GPP_D1, NONE), - /* D2: Not Connected */ - PAD_NC(GPP_D2, NONE), - /* D3: Not Connected */ - PAD_NC(GPP_D3, NONE), - /* D4: Not Connected */ - PAD_NC(GPP_D4, NONE), - /* D5: Not Connected */ - PAD_NC(GPP_D5, NONE), - /* D6: Not Connected */ - PAD_NC(GPP_D6, NONE), - /* D7: ISH_I2C1_SDA */ - PAD_NC(GPP_D7, NONE), - /* D8: ISH_I2C1_SDL */ - PAD_NC(GPP_D8, NONE), - /* D9: TCH_PNL2_RST_R_N */ - PAD_CFG_GPO(GPP_D9, 1, PLTRST), - /* D10: TCH_PNL2_INT_R_N */ - PAD_NC(GPP_D10, NATIVE), - /* D11: Not Connected */ - PAD_NC(GPP_D11, NATIVE), - /* D12: GPPC_D_12 */ - PAD_CFG_GPO(GPP_D12, 0, DEEP), - /* D13: WWAN_FCP_OFF_N */ - PAD_NC(GPP_D13, NONE), - /* D14: TCH_PNL1_RST_N */ - PAD_CFG_GPO(GPP_D14, 1, PLTRST), - /* D15: Not Connected */ - PAD_NC(GPP_D15, NONE), - /* D16: GPIO_2_EC */ - PAD_CFG_GPO(GPP_D16, 0, PWROK), - /* D17: DMIC_CLK1_SNDW3_CLK */ - PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), - /* D18: DMIC_DATA1_SNDW3_DATA */ - PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), - /* D19: DMIC_CLK_0 */ - PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), - /* D20: DMIC_DATA_0 */ - PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1), - /* D21: Not Connected */ - PAD_NC(GPP_D21, NONE), - /* D22: TPM_RST */ - PAD_NC(GPP_D22, NONE), - /* D23: TPM_IRQ */ - PAD_NC(GPP_D23, NONE), - - /* E0: Not Connected */ - PAD_NC(GPP_E0, NONE), - /* E1: GPPC_E1_SATAXPCIE_1_SATAGP_1 */ - PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1), - /* E2: Not Connected */ - PAD_NC(GPP_E2, NONE), - /* E3: Not Connected */ - PAD_NC(GPP_E3, NONE), - /* E4: Not Connected */ - PAD_NC(GPP_E4, NONE), - /* E5: GPPC_E5_SATA_DEVSLP_1 */ - PAD_NC(GPP_E5, NONE), - /* E6: Not Connected */ - PAD_NC(GPP_E6, NONE), - /* E7: Not Connected */ - PAD_CFG_GPI(GPP_E7, NONE, PLTRST), - /* E8: Not Connected */ - PAD_NC(GPP_E8, NONE), - /* E9: GPPC_E9_USB2_OCB_0 */ - PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), - /* E10: GPPC_E10_USB2_OCB_1 */ - PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), - /* E11: USB2_P3_WP2_OC_N */ - PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1), - /* E12: GPPC_E12_USB2_OCB_3 */ - PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1), - /* E13: DDI1_HPD */ - PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), - /* E14: DDI2_HPD */ - PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), - /* E15: SMC_SMI_N */ - PAD_CFG_GPI_SMI_LOW(GPP_E15, NONE, DEEP, EDGE_SINGLE), - /* E16: SMC_SCI_N */ - PAD_CFG_GPI_SCI_LOW(GPP_E16, NONE, PLTRST, LEVEL), - /* E17: EDP_HPD */ - PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), - /* E18: DDI1_DDC_SCL */ - PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), - /* E19: DDI1_DDC_SDA */ - PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1), - /* E20: DDI2_CTRL_CLK */ - PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), - /* E21: DDI2_CTRL_DATA */ - PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), - - /* F0: Not Connected */ - PAD_NC(GPP_F0, NONE), - /* F1: Not Connected */ - PAD_NC(GPP_F1, NONE), - /* F2: Not Connected */ - PAD_NC(GPP_F2, NONE), - /* F3: Not Connected */ - PAD_NC(GPP_F3, NONE), - /* F4: CNV_BRI_DT_R */ - PAD_CFG_NF(GPP_F4, UP_20K, DEEP, NF1), - /* F5: CNV_BRI_RSP */ - PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1), - /* F6: CNV_RGI_DT_R */ - PAD_CFG_NF(GPP_F6, UP_20K, DEEP, NF1), - /* F7: CNV_RGI_RSP */ - PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1), - /* F8: Not Connected */ - PAD_NC(GPP_F8, NONE), - /* F9: Not Connected */ - PAD_NC(GPP_F9, NONE), - /* F10: Not Connected */ - PAD_NC(GPP_F10, NONE), - /* F11: EMMC_CMD */ - PAD_NC(GPP_F11, NONE), - /* F12: EMMC_DATA_0 */ - PAD_NC(GPP_F12, NONE), - /* F13: EMMC_DATA_1 */ - PAD_NC(GPP_F13, NONE), - /* F14: EMMC_DATA_2 */ - PAD_NC(GPP_F14, NONE), - /* F15: EMMC_DATA_3 */ - PAD_NC(GPP_F15, NONE), - /* F16: EMMC_DATA_4 */ - PAD_NC(GPP_F16, NONE), - /* F17: EMMC_DATA_5 */ - PAD_NC(GPP_F17, NONE), - /* F18: EMMC_DATA_6 */ - PAD_NC(GPP_F18, NONE), - /* F19: EMMC_DATA_7 */ - PAD_NC(GPP_F19, NONE), - /* F20: EMMC_STROBE */ - PAD_NC(GPP_F20, NONE), - /* F21: EMMC_CLK */ - PAD_NC(GPP_F21, NONE), - /* F22: EMMC_RESETB */ - PAD_NC(GPP_F22, NONE), - /* F23: A4WP_PRESENT */ - PAD_CFG_NF(GPP_F23, DN_20K, DEEP, NF1), - - /* G0: Not Connected */ - PAD_NC(GPP_G0, NONE), - /* G1: Not Connected */ - PAD_NC(GPP_G1, NONE), - /* G2: Not Connected */ - PAD_NC(GPP_G2, NONE), - /* G3: Not Connected */ - PAD_NC(GPP_G3, NONE), - /* G4: Not Connected */ - PAD_NC(GPP_G4, NONE), - /* G5: Not Connected */ - PAD_NC(GPP_G5, UP_20K), - /* G6: Not Connected */ - PAD_NC(GPP_G6, NONE), - /* G7: Not Connected */ - PAD_NC(GPP_G7, DN_20K), - - /* H0: Not Connected */ - PAD_NC(GPP_H0, NONE), - /* H1: GPPC_H1_SSP2_SFRM */ - PAD_CFG_NF(GPP_H1, UP_20K, DEEP, NF3), - /* H2: GPPC_H2_SSP2_TXD */ - PAD_CFG_NF(GPP_H2, UP_20K, DEEP, NF3), - /* H3: Not Connected */ - PAD_NC(GPP_H3, UP_20K), - /* H4: GSENSOR_I2C_SDA */ - PAD_NC(GPP_H4, NONE), - /* H5: GSENSOR_I2C_SCL */ - PAD_NC(GPP_H5, NONE), - /* H8: Not Connected */ - PAD_NC(GPP_H8, NONE), - /* H9: Not Connected */ - PAD_NC(GPP_H9, NONE), - /* H10: ISH_I2C2_SDA */ - PAD_CFG_GPO(GPP_H10, 1, PLTRST), - /* H11: ISH_I2C2_SCL */ - PAD_CFG_GPO(GPP_H11, 1, PLTRST), - /* H12: Not Connected */ - PAD_NC(GPP_H12, NONE), - /* H13: Not Connected */ - PAD_NC(GPP_H13, NONE), - /* H14: Not Connected */ - PAD_NC(GPP_H14, NONE), - /* H15: Not Connected */ - PAD_NC(GPP_H15, NONE), - /* H16: Not Connected */ - PAD_NC(GPP_H16, NONE), - /* H17: GPPC_H_17_WWAN_DISABLE_N */ - PAD_CFG_GPO(GPP_H17, 0, DEEP), - /* H18: GPPC_H_18_CPU_C10 */ - PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), - /* H19: Not Connected */ - PAD_NC(GPP_H19, NONE), - /* H20: Not Connected */ - PAD_NC(GPP_H20, NONE), - /* H21: GPPC_H21 */ - PAD_CFG_GPO(GPP_H21, 0, DEEP), - /* H22: Not Connected */ - PAD_NC(GPP_H22, NONE), - /* H23: GPPC_H23 */ - PAD_CFG_GPO(GPP_H23, 0, DEEP), -}; - -const struct pad_config *variant_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(gpio_table); - return gpio_table; -} diff --git a/src/mainboard/starlabs/labtop/variants/cml/hda_verb.c b/src/mainboard/starlabs/labtop/variants/cml/hda_verb.c deleted file mode 100644 index 76762a509c..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/hda_verb.c +++ /dev/null @@ -1,221 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/azalia_device.h> - -const u32 cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0256, /* Codec Vendor / Device ID: Realtek ALC256 */ - 0x10ec1200, /* Subsystem ID */ - 38, /* Number of jacks (NID entries) */ - - /* Reset Codec First */ - AZALIA_RESET(0x1), - - /* HDA Codec Subsystem ID */ - AZALIA_SUBVENDOR(0, 0x10ec1200), - - /* Pin Widget Verb-table */ - AZALIA_PIN_CFG(0, 0x01, 0x00000000), - AZALIA_PIN_CFG(0, 0x12, 0x90a61120), - AZALIA_PIN_CFG(0, 0x13, 0x40000000), - AZALIA_PIN_CFG(0, 0x14, 0x90171110), - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - AZALIA_PIN_CFG(0, 0x19, 0x04ab1020), - AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), - AZALIA_PIN_CFG(0, 0x1b, 0x40700001), - AZALIA_PIN_CFG(0, 0x1d, 0x411111f0), - AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), - AZALIA_PIN_CFG(0, 0x21, 0x042b1010), - - /* Reset to D0 */ - 0x00170500, - 0x00170500, - 0x00170500, - 0x00170500, - - /* Reset Register */ - 0x0205001A, - 0x02048003, - 0x0205001A, - 0x0204C003, - - /* ALC256 Default 1 */ - 0x0205003C, - 0x02040354, - 0x0205003C, - 0x02040314, - - /* ALC256 Default 2 */ - 0x02050040, - 0x02049800, - 0x02050034, - 0x0204023C, - - /* ALC256 Default 3 */ - 0x05750003, - 0x05740DA3, - 0x02050046, - 0x02040004, - - /* ALC256 Default 4 */ - 0x0205001B, - 0x02040A4B, - 0x02050008, - 0x02046A6C, - - /* Jack Detection */ - 0x02050009, - 0x0204E003, - 0x0205000A, - 0x02047770, - - /* Combo Jack TRS setting */ - 0x02050038, - 0x02047901, - - /* Disable Microphone Security */ - 0x0205000D, - 0x0204A020, - - /* Enable ADC clock */ - 0x02050005, - 0x02040700, - - /* Speaker Enable */ - 0x0205000C, - 0x020401EF, - - /* - * Equalizer: - * - * AGC - * Threshold: - 6.00 dB - * Front Boost: + 6.00 dB - * Post Boost: + 6.00 dB - * - * Low Pass Filter - * Boost Gain: Enabled - * BW: 200Hz - * Gain: + 4.00 dB - * - * Band Pass Filter 1 - * Fc: 240Hz - * BW: 400Hz - * Gain: - 4.00 dB - * - * Band Pass Filter 2 - * Fc: 16000Hz - * BW: 1000Hz - * Gain: + 12.00 dB - * - * High Pass Filter - * Boost Gain: Enabled - * BW: 200Hz - * Gain: - 4.00 dB - * - * Class D Amp - * Power: 2.5W - * Resistance: 4ohms - * - * EQ Output - * Left: + 0.00 dB - * Right: + 0.00 dB - * - * VARQ - * Q: 0.707 - */ - - 0x05350000, - 0x053404DA, - 0x0535001d, - 0x05340800, - - 0x0535001e, - 0x05340800, - 0x05350003, - 0x05341F7A, - - 0x05350004, - 0x0534FA18, - 0x0535000F, - 0x0534C295, - - 0x05350010, - 0x05341D73, - 0x05350011, - 0x0534FA18, - - 0x05350012, - 0x05341E08, - 0x05350013, - 0x05341C10, - - 0x05350014, - 0x05342FB2, - 0x0535001B, - 0x05341F2C, - - 0x0535001C, - 0x0534095C, - 0x05450000, - 0x05440000, - - 0x0545001d, - 0x05440800, - 0x0545001e, - 0x05440800, - - 0x05450003, - 0x05441F7A, - 0x05450004, - 0x0544FA18, - - 0x0545000F, - 0x0544C295, - 0x05450010, - 0x05441D73, - - 0x05450011, - 0x0544FA18, - 0x05450012, - 0x05441E08, - - 0x05450013, - 0x05441C10, - 0x05450014, - 0x05442FB2, - - 0x0545001B, - 0x05441F2C, - 0x0545001C, - 0x0544095C, - - 0x05350000, - 0x0534C4DA, - 0x02050038, - 0x02044901, - - 0x02050013, - 0x0204422F, - 0x02050016, - 0x02044E50, - - 0x02050012, - 0x0204EBC4, - 0x02050020, - 0x020451FF, - - 0x8086280b, /* Codec Vendor / Device ID: Intel */ - 0x80860101, /* Subsystem ID */ - 4, /* Number of 4 dword sets */ - - AZALIA_SUBVENDOR(2, 0x80860101), - - AZALIA_PIN_CFG(2, 0x05, 0x18560010), - AZALIA_PIN_CFG(2, 0x06, 0x18560010), - AZALIA_PIN_CFG(2, 0x07, 0x18560010), -}; - -const u32 pc_beep_verbs[] = {}; - -AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/starlabs/labtop/variants/cml/romstage.c b/src/mainboard/starlabs/labtop/variants/cml/romstage.c deleted file mode 100644 index 75a19e576b..0000000000 --- a/src/mainboard/starlabs/labtop/variants/cml/romstage.c +++ /dev/null @@ -1,78 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <gpio.h> -#include <option.h> -#include <soc/cnl_memcfg_init.h> -#include <soc/romstage.h> -#include <string.h> -#include <types.h> - -static unsigned int get_memory_config_straps(void) -{ - /* - * The hardware supports a number of different memory configurations - * which are selected using four ID bits ID3 (GPP_H7), ID2 (GPP_H6), - * ID1 (GPP_E23) and ID0 (GPP_E22). - * - * The mapping is defined in the schematics as follows (ID3 is always - * 0 and can be ignored): - * - * ID2 ID1 ID0 Memory type - * ----------------------------------------------- - * 0 0 0 Hynix 16G dual channel - * 0 0 1 Micron 16G dual channel - * 0 1 0 Hynix 8G dual channel - * 0 1 1 Hynix 4G single channel - * 1 0 0 Micron 8G dual channel - * 1 0 1 Micron 4G single channel - * 1 1 0 Samsung 8G dual channel - * 1 1 1 Samsung 4G single channel - * - * We return the value of these bits so that the index into the SPD - * table can be .spd[] values can be configured correctly in the - * memory configuration structure. - */ - - gpio_t memid_gpios[] = {GPP_E22, GPP_E23, GPP_H6}; - return (u8)gpio_base2_value(memid_gpios, ARRAY_SIZE(memid_gpios)); -} - -static bool is_dual_channel(const unsigned int memid) -{ - return memid != 3 && memid != 5 && memid != 7; -} - -static void fill_spd_data(struct cnl_mb_cfg *mem_cfg) -{ - const unsigned int memid = get_memory_config_straps(); - printk(BIOS_DEBUG, "Memory config straps: 0x%.2x\n", memid); - /* - * If we are using single channel ID = 3, 5 or 7 then we only - * populate .spd[0].If we are dual channel then we also populate - * .spd[2] as well. - */ - mem_cfg->spd[0].read_type = READ_SPD_CBFS; - mem_cfg->spd[0].spd_spec.spd_index = memid; - if (is_dual_channel(memid)) { - mem_cfg->spd[2].read_type = READ_SPD_CBFS; - mem_cfg->spd[2].spd_spec.spd_index = memid; - } -} - -void mainboard_memory_init_params(FSPM_UPD *memupd) -{ - struct cnl_mb_cfg memcfg = { - .rcomp_resistor = {121, 81, 100}, - .rcomp_targets = {100, 40, 20, 20, 26}, - .dq_pins_interleaved = 0, - .vref_ca_config = 2, - .ect = 0, - }; - - const uint8_t vtd = get_uint_option("vtd", 1); - memupd->FspmTestConfig.VtdDisable = !vtd; - - fill_spd_data(&memcfg); - cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); -} diff --git a/src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc b/src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc deleted file mode 100644 index 2a505c35c7..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -bootblock-y += gpio.c - -romstage-y += romstage.c - -ramstage-y += devtree.c -ramstage-y += gpio.c -ramstage-y += hda_verb.c diff --git a/src/mainboard/starlabs/labtop/variants/kbl/board.fmd b/src/mainboard/starlabs/labtop/variants/kbl/board.fmd deleted file mode 100644 index ef63457460..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/board.fmd +++ /dev/null @@ -1,9 +0,0 @@ -FLASH 8M { - BIOS@0x200000 0x600000 { - RW_MRC_CACHE@0x0 0x10000 - SMMSTORE@0x10000 0x40000 - CONSOLE@0x50000 0x20000 - FMAP@0x70000 0x200 - COREBOOT(CBFS) - } -} diff --git a/src/mainboard/starlabs/labtop/variants/kbl/data.vbt b/src/mainboard/starlabs/labtop/variants/kbl/data.vbt Binary files differdeleted file mode 100644 index 12010f3542..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/data.vbt +++ /dev/null diff --git a/src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb deleted file mode 100644 index 04dabb9d27..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb +++ /dev/null @@ -1,183 +0,0 @@ -chip soc/intel/skylake -# CPU - # Enable Enhanced Intel SpeedStep - register "eist_enable" = "1" - - # Graphics - # IGD Displays - register "panel_cfg" = "{ - .up_delay_ms = 0, // T3 - .backlight_on_delay_ms = 0, // T7 - .backlight_off_delay_ms = 0, // T9 - .down_delay_ms = 0, // T10 - .cycle_delay_ms = 500, // T12 - .backlight_pwm_hz = 200, // PWM - }" - - # FSP Memory - register "SaGv" = "SaGv_Enabled" - -# FSP Silicon - # Serial I/O - register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoPci, - [PchSerialIoIndexUart2] = PchSerialIoSkipInit, - }" - - # Power - register "PmConfigSlpS3MinAssert" = "2" # 50ms - register "PmConfigSlpS4MinAssert" = "3" # 1s - register "PmConfigSlpSusMinAssert" = "3" # 500ms - register "PmConfigSlpAMinAssert" = "3" # 2s - - # Thermal - register "tcc_offset" = "10" - - # PM Util - # GPE configuration - # Note that GPE events called out in ASL code rely on this - # route. i.e. If this route changes then the affected GPE - # offset bits also need to be changed. - # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG) - register "gpe0_dw0" = "GPP_B" - register "gpe0_dw1" = "GPP_C" - register "gpe0_dw2" = "GPP_E" - - # Enable the correct decode ranges on the LPC bus. - register "lpc_ioe" = "LPC_IOE_EC_4E_4F | - LPC_IOE_KBC_60_64 | - LPC_IOE_EC_62_66" - -# Actual device tree. - device cpu_cluster 0 on - device lapic 0 on end - end - - device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 02.0 on end # Integrated Graphics Device - device pci 04.0 on end # SA Thermal Device - device pci 14.0 on # USB xHCI - # Motherboard USB Type C - register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Motherboard USB 3.0 - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Daughterboard USB 3.0 - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Daughterboard SD Card - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" - - # Webcam - register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)" - - # Internal Bluetooth - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" - end - device pci 14.1 off end # USB xDCI (OTG) - device pci 14.2 on end # Thermal Subsystem - device pci 15.0 on # I2C #0 - chip drivers/i2c/hid - register "generic.hid" = ""STAR0001"" - register "generic.desc" = ""Touchpad"" - register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C23_IRQ)" - register "generic.probed" = "1" - register "hid_desc_reg_offset" = "0x20" - device i2c 2c on end - end - end - device pci 15.1 off end # I2C1 - device pci 15.2 off end # I2C2 - device pci 15.3 off end # I2C3 - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT Redirection - device pci 16.4 off end # Management Engine Interface 3 - device pci 17.0 on # SATA - register "SataSalpSupport" = "1" - # Port 1 - register "SataPortsEnable[1]" = "1" - register "SataPortsDevSlp[1]" = "1" - end - device pci 19.0 on end # UART #2 - device pci 19.1 off end # I2C4 - device pci 19.2 off end # I2C5 - device pci 1c.0 off end # PCI Express Port 1 - device pci 1c.1 off end # PCI Express Port 2 - device pci 1c.2 off end # PCI Express Port 3 - device pci 1c.3 off end # PCI Express Port 4 - device pci 1c.4 off end # PCI Express Port 5 - device pci 1c.5 on # PCI Express Port 6 - register "PcieRpEnable[5]" = "1" - register "PcieRpClkReqSupport[5]" = "1" - register "PcieRpClkReqNumber[5]" = "4" - register "PcieRpClkSrcNumber[5]" = "4" - register "PcieRpLtrEnable[5]" = "1" - chip drivers/wifi/generic - device generic 0 on end - end - end - device pci 1c.6 off end # PCI Express Port 7 - device pci 1c.7 off end # PCI Express Port 8 - device pci 1d.0 on # PCI Express Port 9(SSD x4) - register "PcieRpEnable[8]" = "1" - register "PcieRpClkReqSupport[8]" = "1" - register "PcieRpClkReqNumber[8]" = "0" - register "PcieRpClkSrcNumber[8]" = "0" - register "PcieRpLtrEnable[8]" = "1" - smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X" - end - device pci 1d.1 off end # PCI Express Port 10 - device pci 1d.2 off end # PCI Express Port 11 - device pci 1d.3 off end # PCI Express Port 12 - device pci 1e.0 on end # UART #0 - device pci 1e.1 off end # UART #1 - device pci 1e.2 off end # GSPI #0 - device pci 1e.3 off end # GSPI #1 - device pci 1e.4 off end # eMMC - device pci 1e.5 off end # SDIO - device pci 1e.6 off end # SDCard - device pci 1f.0 on # LPC Interface - register "gen1_dec" = "0x000c0681" - register "gen2_dec" = "0x000c1641" - register "gen3_dec" = "0x00000069" - register "gen4_dec" = "0x0000006d" - - chip ec/starlabs/merlin - # Port pair 4Eh/4Fh - device pnp 4e.00 on end # IO Interface - device pnp 4e.01 off end # Com 1 - device pnp 4e.02 off end # Com 2 - device pnp 4e.04 off end # System Wake-Up - device pnp 4e.05 off end # PS/2 Mouse - device pnp 4e.06 on # PS/2 Keyboard - io 0x60 = 0x0060 - io 0x62 = 0x0064 - irq 0x70 = 1 - end - device pnp 4e.0a off end # Consumer IR - device pnp 4e.0f off end # Shared Memory/Flash Interface - device pnp 4e.10 off end # RTC-like Timer - device pnp 4e.11 off end # Power Management Channel 1 - device pnp 4e.12 off end # Power Management Channel 2 - device pnp 4e.13 off end # Serial Peripheral Interface - device pnp 4e.14 off end # Platform EC Interface - device pnp 4e.17 off end # Power Management Channel 3 - device pnp 4e.18 off end # Power Management Channel 4 - device pnp 4e.19 off end # Power Management Channel 5 - end - end - device pci 1f.1 off end # P2SB - device pci 1f.2 on end # Power Management Controller - device pci 1f.3 on end # Intel HDA - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # PCH SPI - device pci 1f.6 off end # GbE - end -end diff --git a/src/mainboard/starlabs/labtop/variants/kbl/devtree.c b/src/mainboard/starlabs/labtop/variants/kbl/devtree.c deleted file mode 100644 index 898519e876..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/devtree.c +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <chip.h> -#include <cpu/intel/turbo.h> -#include <device/device.h> -#include <device/pci_def.h> -#include <option.h> -#include <types.h> -#include <variants.h> - -void devtree_update(void) -{ - config_t *cfg = config_of_soc(); - - struct soc_power_limits_config *soc_conf = &cfg->power_limits_config; - - struct device *nic_dev = pcidev_on_root(0x1c, 5); - - /* Update PL1 & PL2 based on CMOS settings */ - switch (get_uint_option("power_profile", 0)) { - case 1: - soc_conf->tdp_pl1_override = 17; - soc_conf->tdp_pl2_override = 20; - break; - case 2: - soc_conf->tdp_pl1_override = 20; - soc_conf->tdp_pl2_override = 25; - break; - default: - disable_turbo(); - soc_conf->tdp_pl1_override = 15; - soc_conf->tdp_pl2_override = 15; - break; - } - - /* Enable/Disable Wireless based on CMOS settings */ - if (get_uint_option("wireless", 1) == 0) - nic_dev->enabled = 0; - - /* Enable/Disable Webcam based on CMOS settings */ - cfg->usb2_ports[CONFIG_CCD_PORT].enable = get_uint_option("webcam", 1); -} diff --git a/src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads b/src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads deleted file mode 100644 index 8402b39a94..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads +++ /dev/null @@ -1,18 +0,0 @@ --- SPDX-License-Identifier: GPL-2.0-or-later - -with HW.GFX.GMA; -with HW.GFX.GMA.Display_Probing; - -use HW.GFX.GMA; -use HW.GFX.GMA.Display_Probing; - -private package GMA.Mainboard is - - ports : constant Port_List := - (DP1, -- USB-C - HDMI1, -- USB-C - HDMI2, -- HDMI - eDP, - others => Disabled); - -end GMA.Mainboard; diff --git a/src/mainboard/starlabs/labtop/variants/kbl/gpio.c b/src/mainboard/starlabs/labtop/variants/kbl/gpio.c deleted file mode 100644 index 9ab74148da..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/gpio.c +++ /dev/null @@ -1,356 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <variants.h> - -/* - * All definitions are taken from a comparison of the output of "inteltool -a" - * using the stock BIOS and with coreboot. - */ - -/* Early pad configuration in bootblock. */ -const struct pad_config early_gpio_table[] = { - /* C20: UART2_RXD */ - PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), - /* C21: UART2_TXD */ - PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), -}; - -const struct pad_config *variant_early_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(early_gpio_table); - return early_gpio_table; -} - -/* Pad configuration in ramstage. */ -const struct pad_config gpio_table[] = { - /* GPD0: PM_BATLOW_N */ - PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), - /* GPD1: AC_PRESENT */ - PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), - /* GPD2: Not Connected */ - PAD_NC(GPD2, NONE), - /* GPD3: SOC_PWRBTN_N */ - PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), - /* GPD4: SLP_S3_N */ - PAD_CFG_NF(GPD4, NONE, PWROK, NF1), - /* GPD5: SLP_S4_N */ - PAD_CFG_NF(GPD5, NONE, PWROK, NF1), - /* GPD6: Not Connected */ - PAD_NC(GPD6, NONE), - /* GPD7: Not Connected */ - PAD_NC(GPD7, NONE), - /* GPD8: SUS_CLK */ - PAD_CFG_NF(GPD8, NONE, PWROK, NF1), - /* GPD9: Not Connected */ - PAD_NC(GPD9, NONE), - /* GPD10: Not Connected */ - PAD_NC(GPD10, NONE), - /* GPD11: Not Connected */ - PAD_NC(GPD11, NONE), - /* GPP_A0: KBRST_N */ - PAD_NC(GPP_A0, NONE), - /* GPP_A1: LDC_AD0 */ - PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1), - /* GPP_A2: LPC_AD1 */ - PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1), - /* GPP_A3: LDC_AD2 */ - PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1), - /* GPP_A4: LDC_AD3 */ - PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1), - /* GPP_A5: LPC_FRAME_N */ - PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), - /* GPP_A6: LPC_SERIRQ */ - PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), - /* GPP_A7: Not Connected */ - PAD_NC(GPP_A7, NONE), - /* GPP_A8: PM_CLKRUN_N */ - PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), - /* GPP_A9: LPC_CLK_EC */ - PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), - /* GPP_A10: LPC_CLK_Debug */ - PAD_NC(GPP_A10, DN_20K), - /* GPP_A11: PME_N */ - PAD_CFG_GPI(GPP_A11, DN_20K, DEEP), - /* GPP_A12: Not Connected */ - PAD_NC(GPP_A12, NONE), - /* GPP_A13: SUSPWRDNACK */ - PAD_NC(GPP_A13, DN_20K), - /* GPP_A14: PM_SUS_STAT_N */ - PAD_NC(GPP_A14, DN_20K), - /* GPP_A15: SUSACK# */ - PAD_NC(GPP_A15, DN_20K), - /* GPP_A16: Not Connected */ - PAD_NC(GPP_A16, DN_20K), - /* GPP_A17: Not Connected */ - PAD_NC(GPP_A17, DN_20K), - /* GPP_A18: Not Connected */ - PAD_NC(GPP_A18, DN_20K), - /* GPP_A19: Not Connected */ - PAD_NC(GPP_A19, DN_20K), - /* GPP_A20: Not Connected */ - PAD_NC(GPP_A20, NONE), - /* GPP_A21: Not Connected */ - PAD_NC(GPP_A21, DN_20K), - /* GPP_A22: FP_SSP0_INT */ - PAD_NC(GPP_A22, DN_20K), - /* GPP_A23: FP_SSP0_RST */ - PAD_NC(GPP_A23, DN_20K), - /* GPP_B0: Not Connected */ - PAD_NC(GPP_B0, DN_20K), - /* GPP_B1: Not Connected */ - PAD_NC(GPP_B1, DN_20K), - /* GPP_B2: +V3P3A_PCH */ - PAD_NC(GPP_B2, DN_20K), - /* GPP_B3: Not Connected */ - PAD_NC(GPP_B3, DN_20K), - /* GPP_B4: BT_OFF_N_MCP */ - PAD_CFG_TERM_GPO(GPP_B4, 1, UP_20K, DEEP), - /* GPP_B5: SRCCLKREQ0# */ - PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), - /* GPP_B6: CLKREQ1# */ - PAD_CFG_GPI(GPP_B6, DN_20K, DEEP), - /* GPP_B7: CLKREQ2# */ - PAD_CFG_NF(GPP_B7, DN_20K, DEEP, NF1), - /* GPP_B8: CLKREQ3# */ - PAD_CFG_NF(GPP_B8, DN_20K, DEEP, NF1), - /* GPP_B9: WLAN_CLKREQ# */ - PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), - /* GPP_B10: CLKREQ5# */ - PAD_CFG_NF(GPP_B10, DN_20K, DEEP, NF1), - /* GPP_B11: Not Connected */ - PAD_NC(GPP_B11, DN_20K), - /* GPP_B12 SLP_S0_N */ - PAD_NC(GPP_B12, DN_20K), - /* GPP_B13: SYS_RESET# */ - PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), - /* GPP_B14: HDA_SPKR */ - PAD_NC(GPP_B14, DN_20K), - /* GPP_B15: Not Connected */ - PAD_NC(GPP_B15, DN_20K), - /* GPP_B16: Not Connected */ - PAD_NC(GPP_B16, DN_20K), - /* GPP_B17: Not Connected */ - PAD_NC(GPP_B17, DN_20K), - /* GPP_B18: +V3P3A_PCH */ - PAD_NC(GPP_B18, DN_20K), - /* GPP_B19: FP_SSP0_CS */ - PAD_NC(GPP_B19, DN_20K), - /* GPP_B20: FP_SSP0_CLK */ - PAD_NC(GPP_B20, DN_20K), - /* GPP_21: FP_SSP0_MISO */ - PAD_NC(GPP_B21, DN_20K), - /* GPP_22: FP_SSP0_MOSI */ - PAD_NC(GPP_B22, DN_20K), - /* GPP_B23: SML1ALERT#/PCHHOT# */ - PAD_NC(GPP_B23, DN_20K), - /*GPP_C0: SMBCLK */ - PAD_CFG_NF(GPP_C0, UP_20K, DEEP, NF1), - /* GPP_C1: SMBDATA */ - PAD_CFG_NF(GPP_C1, UP_20K, DEEP, NF1), - /* GPP_C2: SMBALERT# */ - PAD_NC(GPP_C2, DN_20K), - /* GPP_C3: SML0CLK */ - PAD_NC(GPP_C3, DN_20K), - /* GPP_C4: SML0DATA */ - PAD_NC(GPP_C4, DN_20K), - /* GPP_C5: SML0ALERT# */ - PAD_NC(GPP_C5, DN_20K), - /* GPP_C6: SML1CLK */ - PAD_NC(GPP_C6, DN_20K), - /* GPP_C7: SML1DATA */ - PAD_NC(GPP_C7, DN_20K), - /* GPP_C8: UART0_RXD */ - PAD_CFG_NF(GPP_C8, UP_20K, DEEP, NF1), - /* GPP_C9: UART0_TXD */ - PAD_CFG_NF(GPP_C9, UP_20K, DEEP, NF1), - /* GPP_C10: UART0_RTS# */ - PAD_CFG_NF(GPP_C10, NONE, DEEP, NF1), - /* GPP_C11: UART0_CTS# */ - PAD_CFG_NF(GPP_C11, UP_20K, DEEP, NF1), - /* GPP_C12: Not Connected */ - PAD_NC(GPP_C12, UP_20K), - /* GPP_C13: Not Connected */ - PAD_NC(GPP_C13, UP_20K), - /* GPP_C14: Not Connected */ - PAD_NC(GPP_C14, UP_20K), - /* GPP_C15: Not Connected */ - PAD_NC(GPP_C15, UP_20K), - /* GPP_C16: DAT_I2C_TP */ - PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), - /* GPP_C17: CLK_I2C_TP */ - PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), - /* GPP_C18: TOUCH_I2C_SDA */ - PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), - /* GPP_C19: TOUCH_I2C_CLK */ - PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), - /* GPP_C22: Not Connected */ - PAD_NC(GPP_C22, NONE), - /* GPP_C23: TOUCHPAD_INT */ - PAD_CFG_GPI_APIC_LOW(GPP_C23, NONE, PLTRST), - /* GPP_D0: Not Connected */ - PAD_NC(GPP_D0, DN_20K), - /* GPP_D1: Not Connected */ - PAD_NC(GPP_D1, DN_20K), - /* GPP_D2: Not Connected */ - PAD_NC(GPP_D2, DN_20K), - /* GPP_D3: Not Connected */ - PAD_NC(GPP_D3, DN_20K), - /* GPP_D4: Not Connected */ - PAD_NC(GPP_D4, DN_20K), - /* GPP_D5: Not Connected */ - PAD_NC(GPP_D5, DN_20K), - /* GPP_D6: Not Connected */ - PAD_NC(GPP_D6, DN_20K), - /* GPP_D7: Not Connected */ - PAD_NC(GPP_D7, DN_20K), - /* GPP_D8: Not Connected */ - PAD_NC(GPP_D8, DN_20K), - /* GPP_D9: VOLUME_UP */ - PAD_NC(GPP_D9, DN_20K), - /* GPP_D10: VOLUME_DOWN */ - PAD_NC(GPP_D10, DN_20K), - /* GPP_D11: Not Connected */ - PAD_NC(GPP_D11, DN_20K), - /* GPP_D12: Not Connected */ - PAD_NC(GPP_D12, DN_20K), - /* GPP_D13: Not Connected */ - PAD_NC(GPP_D13, DN_20K), - /* GPP_D14: GPP_D14 */ - PAD_NC(GPP_D14, DN_20K), - /* GPP_D15: GPP_D15 */ - PAD_NC(GPP_D15, DN_20K), - /* GPP_D16: GPP_D16 */ - PAD_NC(GPP_D16, DN_20K), - /* GPP_D17: PCH_AUDIO_PWREN */ - PAD_NC(GPP_D17, DN_20K), - /* GPP_D18: Not Connected */ - PAD_NC(GPP_D18, DN_20K), - /* GPP_D19: Not Connected */ - PAD_NC(GPP_D19, DN_20K), - /* GPP_D20: WIFI_OFF_N_MCP */ - PAD_CFG_TERM_GPO(GPP_D20, 1, UP_20K, DEEP), - /* GPP_D21: Not Connected */ - PAD_NC(GPP_D21, DN_20K), - /* GPP_D22: Not Connected */ - PAD_NC(GPP_D22, DN_20K), - /* GPP_D23: Not Connected */ - PAD_NC(GPP_D23, DN_20K), - /* GPP_E0: Not Connected */ - PAD_NC(GPP_E0, DN_20K), - /* GPP_E1: Not Connected */ - PAD_NC(GPP_E1, DN_20K), - /* GPP_E2: SATA2_SSD_Type */ - PAD_NC(GPP_E2, DN_20K), - /* GPP_E3: Not Connected */ - PAD_NC(GPP_E3, DN_20K), - /* GPP_E4: Not Connected */ - PAD_NC(GPP_E4, DN_20K), - /* GPP_E5: Not Connected */ - PAD_NC(GPP_E5, DN_20K), - /* GPP_E6: SATA2_SSD_DEVSLP */ - PAD_CFG_NF(GPP_E6, NONE, PWROK, NF1), - /* GPP_E7: TOUCH_PANEL_INT_N */ - PAD_NC(GPP_E7, DN_20K), - /* GPP_E8: Not Connected */ - PAD_NC(GPP_E8, DN_20K), - /* GPP_E9: USB2_P1_WP1_OC_N */ - PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), - /* GPP_E10: USB2_P2_WP2_OC_N */ - PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), - /* GPP_E11: USB2_P3_WP2_OC_N */ - PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1), - /* GPP_E12: Not Connected */ - PAD_NC(GPP_E12, DN_20K), - /* GPP_E13: DDI1_HPD */ - PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), - /* GPP_E14: DDI2_HPD */ - PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), - /* E15: SMC_SMI_N */ - PAD_CFG_GPI_SMI_LOW(GPP_E15, NONE, DEEP, EDGE_SINGLE), - /* E16: SMC_SCI_N */ - PAD_CFG_GPI_SCI_LOW(GPP_E16, NONE, PLTRST, LEVEL), - /* GPP_E17: EDP_HPD */ - PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), - /* GPP_E18: DDI1_DDC_SCL */ - PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), - /* GPP_E19: DDI1_DDC_SDA */ - PAD_CFG_NF(GPP_E19, DN_20K, DEEP, NF1), - /* GPP_E20: Not Connected */ - PAD_NC(GPP_E20, DN_20K), - /* GPP_E21: DDI2_DDC_SDA */ - PAD_NC(GPP_E21, DN_20K), - /* GPP_E22: Not Connected */ - PAD_NC(GPP_E22, DN_20K), - /* GPP_E23: TOUCH_PANEL_RESET_N */ - PAD_NC(GPP_E23, DN_20K), - /* GPP_F0: Not Connected */ - PAD_NC(GPP_F0, DN_20K), - /* GPP_F1: Not Connected */ - PAD_NC(GPP_F1, DN_20K), - /* GPP_F2: Not Connected */ - PAD_NC(GPP_F2, DN_20K), - /* GPP_F3: Not Connected */ - PAD_NC(GPP_F3, DN_20K), - /* GPP_F4: GSENSOR_I2C_SDA */ - PAD_NC(GPP_F4, DN_20K), - /* GPP_F5: GSENSOR_I2C_SCL */ - PAD_NC(GPP_F5, DN_20K), - /* GPP_F6: Not Connected */ - PAD_NC(GPP_F6, DN_20K), - /* GPP_F7: Not Connected */ - PAD_NC(GPP_F7, DN_20K), - /* GPP_F8: Not Connected */ - PAD_NC(GPP_F8, NONE), - /* GPP_F9: Not Connected */ - PAD_NC(GPP_F9, NONE), - /* GPP_F10: ACCEL2_INT */ - PAD_NC(GPP_F10, DN_20K), - /* GPP_F11: ACCEL1_INT */ - PAD_NC(GPP_F11, DN_20K), - /* GPP_F12: Not Connected */ - PAD_NC(GPP_F12, DN_20K), - /* GPP_F13: Not Connected */ - PAD_NC(GPP_F13, DN_20K), - /* GPP_F14: Not Connected */ - PAD_NC(GPP_F14, DN_20K), - /* GPP_F15: Not Connected */ - PAD_NC(GPP_F15, DN_20K), - /* GPP_F16: Not Connected */ - PAD_NC(GPP_F16, DN_20K), - /* GPP_F17: Not Connected */ - PAD_NC(GPP_F17, DN_20K), - /* GPP_F18: Not Connected */ - PAD_NC(GPP_F18, DN_20K), - /* GPP_F19: Not Connected */ - PAD_NC(GPP_F19, DN_20K), - /* GPP_F20: Not Connected */ - PAD_NC(GPP_F20, DN_20K), - /* GPP_F21: Not Connected */ - PAD_NC(GPP_F21, DN_20K), - /* GPP_F22: Not Connected */ - PAD_NC(GPP_F22, DN_20K), - /* GPP_F23: Not Connected */ - PAD_NC(GPP_F23, DN_20K), - /* GPP_G0: Not Connected */ - PAD_NC(GPP_G0, NONE), - /* GPP_G1: Not Connected */ - PAD_NC(GPP_G1, NONE), - /* GPP_G2: Not Connected */ - PAD_NC(GPP_G2, NONE), - /* GPP_G3: Not Connected */ - PAD_NC(GPP_G3, NONE), - /* GPP_G4: Not Connected */ - PAD_NC(GPP_G4, NONE), - /* GPP_G5: Not Connected */ - PAD_NC(GPP_G5, NONE), - /* GPP_G6: Not Connected */ - PAD_NC(GPP_G6, NONE), - /* GPP_G7: Not Connected */ - PAD_NC(GPP_G7, NONE), -}; - -const struct pad_config *variant_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(gpio_table); - return gpio_table; -} diff --git a/src/mainboard/starlabs/labtop/variants/kbl/hda_verb.c b/src/mainboard/starlabs/labtop/variants/kbl/hda_verb.c deleted file mode 100644 index f09f37b094..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/hda_verb.c +++ /dev/null @@ -1,205 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/azalia_device.h> - -const u32 cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */ - 0x10ec111e, /* Subsystem ID */ - 36, /* Number of jacks (NID entries) */ - - /* Reset Codec First */ - AZALIA_RESET(0x1), - - /* HDA Codec Subsystem ID Verb-table */ - AZALIA_SUBVENDOR(0, 0x10ec111e), - - /* Pin Widget Verb-table */ - AZALIA_PIN_CFG(0, 0x01, 0x00000000), - AZALIA_PIN_CFG(0, 0x12, 0x90a61120), - AZALIA_PIN_CFG(0, 0x14, 0x90171110), - AZALIA_PIN_CFG(0, 0x15, 0x042B1010), - AZALIA_PIN_CFG(0, 0x17, 0x411111F0), - AZALIA_PIN_CFG(0, 0x18, 0x04AB1020), - AZALIA_PIN_CFG(0, 0x19, 0x411111F0), - AZALIA_PIN_CFG(0, 0x1A, 0x411111F0), - AZALIA_PIN_CFG(0, 0x1B, 0x411111F0), - AZALIA_PIN_CFG(0, 0x1D, 0x411111F0), - AZALIA_PIN_CFG(0, 0x1E, 0x411111F0), - - /* Reset to D0 */ - 0x00170500, - 0x00170500, - 0x00170500, - 0x00170500, - - /* Reset Register */ - 0x0205001A, - 0x02048003, - 0x0205001A, - 0x0204C003, - - /* Widget node 0x20 */ - 0x02050018, - 0x02040184, /* Stock: 0x02043984 */ - 0x0205001C, - 0x02040800, - - /* ALC269 Default 1 */ - 0x02050024, - 0x02040000, - 0x02050004, - 0x02040080, - - /* ALC269 Default 2 */ - 0x02050008, - 0x02040300, - 0x0205000C, - 0x02043F00, - - /* ALC269 Default 4 */ - 0x02050015, - 0x02048002, - 0x02050015, - 0x02048002, - - /* ALC269 Default 4 */ - 0x00C37080, - 0x00270610, - 0x00D37080, - 0x00370610, - - /* - * Equalizer: - * - * AGC - * Threshold: - 6.00 dB - * Front Boost: + 6.00 dB - * Post Boost: + 6.00 dB - * - * Low Pass Filter - * Boost Gain: Enabled - * BW: 200Hz - * Gain: + 4.00 dB - * - * Band Pass Filter 1 - * Fc: 240Hz - * BW: 400Hz - * Gain: - 4.00 dB - * - * Band Pass Filter 2 - * Fc: 16000Hz - * BW: 1000Hz - * Gain: + 12.00 dB - * - * High Pass Filter - * Boost Gain: Enabled - * BW: 200Hz - * Gain: - 4.00 dB - * - * Class D Amp - * Power: 2.5W - * Resistance: 4ohms - * - * EQ Output - * Left: + 0.00 dB - * Right: + 0.00 dB - * - * VARQ - * Q: 0.707 - */ - - 0x05350000, - 0x053404DA, - 0x0535001d, - 0x05340800, - - 0x0535001e, - 0x05340800, - 0x05350003, - 0x05341F7A, - - 0x05350004, - 0x0534FA18, - 0x0535000F, - 0x0534C295, - - 0x05350010, - 0x05341D73, - 0x05350011, - 0x0534FA18, - - 0x05350012, - 0x05341E08, - 0x05350013, - 0x05341C10, - - 0x05350014, - 0x05342FB2, - 0x0535001B, - 0x05341F2C, - - 0x0535001C, - 0x0534095C, - 0x05450000, - 0x05440000, - - 0x0545001d, - 0x05440800, - 0x0545001e, - 0x05440800, - - 0x05450003, - 0x05441F7A, - 0x05450004, - 0x0544FA18, - - 0x0545000F, - 0x0544C295, - 0x05450010, - 0x05441D73, - - 0x05450011, - 0x0544FA18, - 0x05450012, - 0x05441E08, - - 0x05450013, - 0x05441C10, - 0x05450014, - 0x05442FB2, - - 0x0545001B, - 0x05441F2C, - 0x0545001C, - 0x0544095C, - - 0x05350000, - 0x0534C4DA, - 0x02050038, - 0x02044901, - - 0x02050013, - 0x0204422F, - 0x02050016, - 0x02044E50, - - 0x02050012, - 0x0204EBC4, - 0x02050020, - 0x020451FF, - - 0x8086280b, /* Codec Vendor / Device ID: Intel */ - 0x80860101, /* Subsystem ID */ - 4, /* Number of 4 dword sets */ - - AZALIA_SUBVENDOR(2, 0x80860101), - - AZALIA_PIN_CFG(2, 0x05, 0x18560010), - AZALIA_PIN_CFG(2, 0x06, 0x18560010), - AZALIA_PIN_CFG(2, 0x07, 0x18560010), -}; - -const u32 pc_beep_verbs[] = {}; - -AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/starlabs/labtop/variants/kbl/romstage.c b/src/mainboard/starlabs/labtop/variants/kbl/romstage.c deleted file mode 100644 index 098f753f1d..0000000000 --- a/src/mainboard/starlabs/labtop/variants/kbl/romstage.c +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <console/console.h> -#include <option.h> -#include <soc/romstage.h> -#include <spd_bin.h> -#include <string.h> -#include <types.h> - -void mainboard_memory_init_params(FSPM_UPD *mupd) -{ - FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; - const u16 rcomp_resistor[] = {121, 81, 100}; - const u16 rcomp_target[] = {100, 40, 20, 20, 26}; - - memcpy(&mem_cfg->RcompResistor, rcomp_resistor, sizeof(rcomp_resistor)); - memcpy(&mem_cfg->RcompTarget, rcomp_target, sizeof(rcomp_target)); - - mem_cfg->MemorySpdPtr00 = spd_cbfs_map(6); - mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00; - mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; - - const uint8_t ht = get_uint_option("hyper_threading", - mupd->FspmConfig.HyperThreading); - mupd->FspmConfig.HyperThreading = ht; -} diff --git a/src/mainboard/starlabs/labtop/variants/tgl/Makefile.inc b/src/mainboard/starlabs/labtop/variants/tgl/Makefile.inc deleted file mode 100644 index 2a505c35c7..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -bootblock-y += gpio.c - -romstage-y += romstage.c - -ramstage-y += devtree.c -ramstage-y += gpio.c -ramstage-y += hda_verb.c diff --git a/src/mainboard/starlabs/labtop/variants/tgl/board.fmd b/src/mainboard/starlabs/labtop/variants/tgl/board.fmd deleted file mode 100644 index 932739e1e4..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/board.fmd +++ /dev/null @@ -1,18 +0,0 @@ -# -# Manually defined FMD in order to ensure that space is reserved for the EC -# at the top of the BIOS region. -# -FLASH@0xff000000 0x1000000 { - SI_ALL@0x0 0x500000 { - SI_DESC@0x0 0x1000 - SI_ME@0x1000 - } - SI_BIOS@0x500000 0xB00000 { - EC@0x0 0x20000 - RW_MRC_CACHE@0x20000 0x10000 - SMMSTORE@0x30000 0x40000 - CONSOLE@0x70000 0x20000 - FMAP@0x90000 0x800 - COREBOOT(CBFS) - } -} diff --git a/src/mainboard/starlabs/labtop/variants/tgl/data.vbt b/src/mainboard/starlabs/labtop/variants/tgl/data.vbt Binary files differdeleted file mode 100644 index 992a864623..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/data.vbt +++ /dev/null diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb deleted file mode 100644 index c5f7040058..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb +++ /dev/null @@ -1,234 +0,0 @@ -chip soc/intel/tigerlake -# CPU - # Enable Enhanced Intel SpeedStep - register "eist_enable" = "1" - - # Graphics - # Not used but timings left for reference - # register "panel_cfg" = "{ - # .up_delay_ms = 2000, // T3 - # .backlight_on_delay_ms = 0, // T7 - # .backlight_off_delay_ms = 2000, // T9 - # .down_delay_ms = 500, // T10 - # .cycle_delay_ms = 500, // T12 - # .backlight_pwm_hz = 200, // PWM - # }" - - # FSP Memory - register "CnviBtCore" = "true" - register "CnviBtAudioOffload" = "1" - register "enable_c6dram" = "1" - register "SaGv" = "SaGv_Enabled" - register "TcssD3ColdDisable" = "1" - - # FSP Silicon - # Serial I/O - register "SerialIoI2cMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoPci, - [PchSerialIoIndexI2C4] = PchSerialIoSkipInit, - }" - - register "SerialIoUartMode" = "{ - [PchSerialIoIndexUART2] = PchSerialIoSkipInit, - }" - - # Power - register "PchPmSlpS3MinAssert" = "2" # 50ms - register "PchPmSlpS4MinAssert" = "3" # 1s - register "PchPmSlpSusMinAssert" = "3" # 500ms - register "PchPmSlpAMinAssert" = "3" # 2s - - # PM Util - # GPE configuration - # Note that GPE events called out in ASL code rely on this - # route. i.e. If this route changes then the affected GPE - # offset bits also need to be changed. - # sudo devmem2 0xfe001920 (pmc_bar + GPIO_GPE_CFG) - register "pmc_gpe0_dw0" = "GPP_B" - register "pmc_gpe0_dw1" = "GPP_C" - register "pmc_gpe0_dw2" = "GPP_E" - - # Enable the correct decode ranges on the LPC bus. - register "lpc_ioe" = "LPC_IOE_EC_4E_4F | - LPC_IOE_SUPERIO_2E_2F | - LPC_IOE_KBC_60_64 | - LPC_IOE_EC_62_66 | - LPC_IOE_LGE_200" - - # PCIe Clock - register "PcieClkSrcClkReq[0]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[1]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[2]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[4]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[5]" = "PCIE_CLK_NOTUSED" - register "PcieClkSrcClkReq[6]" = "PCIE_CLK_NOTUSED" - -# Actual device tree. - device cpu_cluster 0 on - device lapic 0 on end - end - - device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 02.0 on end # Integrated Graphics Device - device pci 04.0 on end # SA Thermal Device - device pci 05.0 off end # IPU - device pci 06.0 off end # PEG60 - device pci 07.0 on end # TBT_PCIe0 - device pci 07.1 off end # TBT_PCIe1 - device pci 07.2 off end # TBT_PCIe2 - device pci 07.3 off end # TBT_PCIe3 - device pci 08.0 on end # Gaussian Mixture Model - device pci 09.0 off end # NPK - device pci 0a.0 off end # Crash-log SRAM - device pci 0d.0 on # USB xHCI - register "UsbTcPortEn" = "1" - register "TcssXhciEn" = "1" - register "TcssAuxOri" = "0" - end - device pci 0d.1 off end # USB xDCI (OTG) - device pci 0d.2 on # TBT DMA0 - chip drivers/intel/usb4/retimer - register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)" - use tcss_usb3_port1 as dfp[0].typec_port - device generic 0 on end - end - end - device pci 0d.3 off end # TBT - device pci 0e.0 off end # VMD - device pci 10.6 off end - device pci 10.7 off end - device pci 12.0 off end # Thermal Subsystem - device pci 12.6 off end # GSPI #2 - device pci 14.0 on # USB xHCI - # Motherboard USB Type C - register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" - register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" - - # Motherboard USB 3.0 - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Daughterboard USB 3.0 - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" - - # Daughterboard SD Card - register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" - - # Webcam - register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)" - - # Internal Bluetooth - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" - end - device pci 14.1 off end # USB xDCI (OTG) - device pci 14.2 on end # USB xDCI (OTG) - device pci 14.3 on # CNVi - chip drivers/wifi/generic - register "wake" = "GPE0_PME_B0" - device generic 0 on end - end - end - device pci 15.0 on # I2C0 - chip drivers/i2c/hid - register "generic.hid" = ""STAR0001"" - register "generic.desc" = ""Touchpad"" - register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C8_IRQ)" - register "generic.probed" = "1" - register "hid_desc_reg_offset" = "0x20" - device i2c 2c on end - end - end - device pci 15.1 off end # I2C1 - device pci 15.2 off end # I2C2 - device pci 15.3 off end # I2C3 - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT Redirection - device pci 16.4 off end # Management Engine Interface 3 - device pci 16.5 off end # Management Engine Interface 4 - device pci 17.0 on # SATA - register "SataSalpSupport" = "1" - # Port 1 - register "SataPortsEnable[1]" = "1" - register "SataPortsDevSlp[1]" = "1" - end - device pci 19.0 on end # I2C4 - device pci 19.1 off end # I2C5 - device pci 19.2 on end # UART #2 - device pci 1c.0 off end # PCI Express Port 1 - device pci 1c.1 off end # PCI Express Port 2 - device pci 1c.2 off end # PCI Express Port 3 - device pci 1c.3 off end # PCI Express Port 4 - device pci 1c.4 off end # PCI Express Port 5 - device pci 1c.5 off end # PCI Express Port 6 - device pci 1c.6 off end # PCI Express Port 7 - device pci 1c.7 off end # PCI Express Port 8 - device pci 1d.0 on # PCI Express Port 9 (SSD x4) - register "HybridStorageMode" = "0" - register "PcieRpEnable[8]" = "1" - register "PcieRpLtrEnable[8]" = "1" - register "PcieClkSrcUsage[3]" = "0x08" - register "PcieClkSrcClkReq[3]" = "3" - register "PcieRpSlotImplemented[8]" = "1" - smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X" - chip soc/intel/common/block/pcie/rtd3 - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" - register "srcclk_pin" = "3" - device generic 0 on end - end - end - device pci 1d.1 off end # PCI Express Port 10 - device pci 1d.2 off end # PCI Express Port 11 - device pci 1d.3 off end # PCI Express Port 12 - device pci 1e.0 off end # UART #0 - device pci 1e.1 off end # UART #1 - device pci 1e.2 off end # GSPI #0 - device pci 1e.3 on end # GSPI #1 - device pci 1f.0 on # LPC Interface - register "gen1_dec" = "0x000c1641" - register "gen2_dec" = "0x000c0681" - register "gen3_dec" = "0x000c0081" - - chip drivers/pc80/tpm - device pnp 0c31.0 on end - end - - chip ec/starlabs/merlin - # Port pair 4Eh/4Fh - device pnp 4e.00 on end # IO Interface - device pnp 4e.01 off end # Com 1 - device pnp 4e.02 off end # Com 2 - device pnp 4e.04 off end # System Wake-Up - device pnp 4e.05 off end # PS/2 Mouse - device pnp 4e.06 on # PS/2 Keyboard - io 0x60 = 0x0060 - io 0x62 = 0x0064 - irq 0x70 = 1 - end - device pnp 4e.0a off end # Consumer IR - device pnp 4e.0f off end # Shared Memory/Flash Interface - device pnp 4e.10 off end # RTC-like Timer - device pnp 4e.11 off end # Power Management Channel 1 - device pnp 4e.12 off end # Power Management Channel 2 - device pnp 4e.13 off end # Serial Peripheral Interface - device pnp 4e.14 off end # Platform EC Interface - device pnp 4e.17 off end # Power Management Channel 3 - device pnp 4e.18 off end # Power Management Channel 4 - device pnp 4e.19 off end # Power Management Channel 5 - end - end - device pci 1f.1 off end # P2SB - device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 on # Intel HDA - register "PchHdaAudioLinkHdaEnable" = "1" - end - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # PCH SPI - device pci 1f.6 off end # GbE - device pci 1f.7 off end # TH - end -end diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devtree.c b/src/mainboard/starlabs/labtop/variants/tgl/devtree.c deleted file mode 100644 index 1c280c4a34..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/devtree.c +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <chip.h> -#include <cpu/intel/turbo.h> -#include <device/device.h> -#include <device/pci_def.h> -#include <option.h> -#include <types.h> -#include <variants.h> - -void devtree_update(void) -{ - config_t *cfg = config_of_soc(); - - struct soc_power_limits_config *soc_conf_2core = - &cfg->power_limits_config[POWER_LIMITS_U_2_CORE]; - - struct soc_power_limits_config *soc_conf_4core = - &cfg->power_limits_config[POWER_LIMITS_U_4_CORE]; - - struct device *nic_dev = pcidev_on_root(0x14, 3); - struct device *tbt_pci_dev = pcidev_on_root(0x07, 0); - struct device *tbt_dma_dev = pcidev_on_root(0x0d, 2); - - - /* Update PL1 & PL2 based on CMOS settings */ - switch (get_power_profile(PP_POWER_SAVER)) { - case PP_POWER_SAVER: - disable_turbo(); - soc_conf_2core->tdp_pl1_override = 15; - soc_conf_4core->tdp_pl1_override = 15; - soc_conf_2core->tdp_pl2_override = 15; - soc_conf_4core->tdp_pl2_override = 15; - cfg->tcc_offset = 20; - break; - case PP_BALANCED: - soc_conf_2core->tdp_pl1_override = 15; - soc_conf_4core->tdp_pl1_override = 15; - soc_conf_2core->tdp_pl2_override = 25; - soc_conf_4core->tdp_pl2_override = 25; - cfg->tcc_offset = 15; - break; - case PP_PERFORMANCE: - soc_conf_2core->tdp_pl1_override = 28; - soc_conf_4core->tdp_pl1_override = 28; - soc_conf_2core->tdp_pl2_override = 40; - soc_conf_4core->tdp_pl2_override = 40; - cfg->tcc_offset = 10; - break; - } - - /* Enable/Disable Wireless based on CMOS settings */ - if (get_uint_option("wireless", 1) == 0) - nic_dev->enabled = 0; - - /* Enable/Disable Webcam based on CMOS settings */ - cfg->usb2_ports[CONFIG_CCD_PORT].enable = get_uint_option("webcam", 1); - - /* Enable/Disable Thunderbolt based on CMOS settings */ - if (get_uint_option("thunderbolt", 1) == 0) { - cfg->UsbTcPortEn = 0; - cfg->TcssXhciEn = 0; - cfg->TcssD3ColdDisable = 0; - tbt_pci_dev->enabled = 0; - tbt_dma_dev->enabled = 0; - } -} diff --git a/src/mainboard/starlabs/labtop/variants/tgl/gpio.c b/src/mainboard/starlabs/labtop/variants/tgl/gpio.c deleted file mode 100644 index 1ba1b817ef..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/gpio.c +++ /dev/null @@ -1,426 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <variants.h> - -/* - * All definitions are taken from a comparison of the output of "inteltool -a" - * using the stock BIOS and with coreboot. - */ - -/* Early pad configuration in bootblock */ -const struct pad_config early_gpio_table[] = { - /* C20: UART2_RXD_R */ - PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), - /* C21: UART2_TXD_R */ - PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), -}; - -const struct pad_config *variant_early_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(early_gpio_table); - return early_gpio_table; -} - -/* Pad configuration in ramstage. */ -const struct pad_config gpio_table[] = { - /* REFERENCE: EP PER SCHEMATIC */ - - /* GPD0: PCH_BATLOW# */ - PAD_CFG_NF(GPD0, NONE, DEEP, NF1), - /* GPD1: AC_PRESENT */ - PAD_CFG_NF(GPD1, NONE, DEEP, NF1), - /* GPD2: LAN_WAKE# */ - PAD_NC(GPD2, NONE), - /* GPD3: SIO_PWRBTN# */ - PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), - /* GPD4: SIO_SLP_S3# */ - PAD_CFG_NF(GPD4, NONE, DEEP, NF1), - /* GPD5: SIO_SLP_S4# */ - PAD_CFG_NF(GPD5, NONE, DEEP, NF1), - /* GPD6: SIO_SLP_A# */ - PAD_CFG_NF(GPD6, NONE, DEEP, NF1), - /* GPD7: PCH_TBT_PERST# */ - PAD_CFG_GPO(GPD7, 0, PLTRST), - /* GPD8: SUSCLK */ - PAD_CFG_NF(GPD8, NONE, DEEP, NF1), - /* GPD9: SIO_SLP_WLAN# */ - PAD_CFG_NF(GPD9, NONE, DEEP, NF1), - /* GPD10: SIO_SLP_S5# */ - PAD_CFG_NF(GPD10, NONE, DEEP, NF1), - /* GPD11: PM_LANPHY_EN */ - PAD_CFG_NF(GPD11, NONE, DEEP, NF1), - - /* A0: ESPI_IO_0 */ - /* A1: ESPI_IO_1 */ - /* A2: ESPI_IO_2 */ - /* A3: ESPI_IO_3 */ - /* A4: ESPI_CS_L */ - /* A5: ESPI_CLK */ - /* A6: Not Connected(TP764) */ - /* A7: WLAN_PCM_CLK */ - PAD_NC(GPP_A7, NONE), - /* A8: WLAN_PCM_RST */ - PAD_CFG_NF(GPP_A8, NONE, DEEP, NF2), - /* A9: WLAN_PCM_CLKREQ0 */ - PAD_CFG_NF(GPP_A9, NONE, DEEP, NF2), - /* A10: WLAN_PCM_IN */ - PAD_NC(GPP_A10, NONE), - /* A11: M2_CPU_SSD_RST_N */ - PAD_CFG_GPO(GPP_A11, 1, PLTRST), - /* A12: SATAGP_1 */ - PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1), - /* A13: Not Connected */ - PAD_NC(GPP_A13, NONE), - /* A14: Not Connected */ - PAD_NC(GPP_A14, NONE), - /* A15 Not Connected */ - PAD_NC(GPP_A15, NONE), - /* A16: USB2_OCB_3 */ - PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), - /* A17: Not Connected */ - PAD_NC(GPP_A17, NONE), - /* A18: DDIB_HPD */ - PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), - /* A19 Not Connected */ - PAD_NC(GPP_A19, NONE), - /* A20: Not Connected */ - PAD_NC(GPP_A20, NONE), - /* A21 Not Connected */ - PAD_NC(GPP_A21, NONE), - /* A22: Not Connected */ - PAD_NC(GPP_A22, NONE), - /* A23: TC_RETIMER_FORCE_PWR */ - PAD_CFG_GPO(GPP_A23, 0, PLTRST), - - /* B0: CORE_VID_0 */ - PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), - /* B1: CORE_VID_1 */ - PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), - /* B2: VRALERT_N */ - PAD_NC(GPP_B2, NONE), - /* B3: Not Connected */ - PAD_NC(GPP_B3, NONE), - /* B4: Not Connected */ - PAD_NC(GPP_B4, NONE), - /* B5: Not Connected */ - PAD_NC(GPP_B5, NONE), - /* B6: Not Connected */ - PAD_NC(GPP_B6, NONE), - /* B7: Not Connected */ - PAD_NC(GPP_B7, NONE), - /* B8: Not Connected */ - PAD_NC(GPP_B8, NONE), - /* B9: PWR_MON_I2C_SDA_R */ - PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), - /* B10: PWR_MON_I2C_SCL_R */ - PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), - /* B11: I2C_PMC_PD_INT_N */ - PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1), - /* B12: PM_SLP_S0_N */ - PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), - /* B13: PLT_RST_N */ - PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), - /* B14: FPS_RST_N */ - PAD_CFG_GPO(GPP_B14, 1, PLTRST), - /* B15: Not Connected */ - PAD_NC(GPP_B15, NONE), - /* B16: M2_PCH_SSD_PWREN */ - PAD_NC(GPP_B16, NONE), - /* B17: Not Connected */ - PAD_NC(GPP_B17, NONE), - /* B18: UF_CAM_STROBE */ - PAD_CFG_GPO(GPP_B18, 0, DEEP), - /* B19: GSPI1_CS0_FPS_N */ - PAD_NC(GPP_B19, NONE), - /* B20: GSPI1_CLK_FPS */ - PAD_NC(GPP_B20, NONE), - /* B21: GSPI1_MISO_FPS */ - PAD_NC(GPP_B21, NONE), - /* B22: GSPI1_MOSI_FPS */ - PAD_CFG_GPO(GPP_B22, 0, DEEP), - /* B23: CPU_CLKFREQ */ - PAD_CFG_GPO(GPP_B23, 0, DEEP), - - /* C0: SMBCLK */ - PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), - /* C1: SMBDATA */ - PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), - /* C2: SMBALERT_N */ - PAD_CFG_GPO(GPP_C2, 0, DEEP), - /* C3: SML0_CLK */ - PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), - /* C4: SML0_DATA */ - PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), - /* C5: SML0ALERT_IN */ - PAD_CFG_GPO(GPP_C5, 0, DEEP), - /* C6: SML1_CLK */ - PAD_CFG_NF(GPP_C6, NONE, PWROK, NF1), - /* C7: SML1_DATA */ - PAD_CFG_NF(GPP_C7, NONE, PWROK, NF1), - /* C8: CLICK_PAD_INT_N */ - PAD_CFG_GPI_APIC_LOW(GPP_C8, NONE, PLTRST), - /* C9: Not Connected */ - PAD_NC(GPP_C9, NONE), - /* C10: Not Connected */ - PAD_NC(GPP_C10, NONE), - /* C11: Not Connected */ - PAD_NC(GPP_C11, NONE), - /* C12: Not Connected */ - PAD_NC(GPP_C12, NONE), - /* C13: Not Connected */ - PAD_NC(GPP_C13, NONE), - /* C14: TPM_IRQ */ - PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1), - /* C15: TPM_RST */ - PAD_NC(GPP_C15, NONE), - /* C16: I2C0_SDA */ - PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), - /* C17: I2C0_SCL */ - PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), - /* C18: TOUCH_I2C_SDA */ - PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), - /* C19: TOUCH_I2C_CLK */ - PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), - /* C22: Not Connected */ - PAD_NC(GPP_C22, NONE), - /* C23: WLAN_WAKE_N */ - PAD_NC(GPP_C23, NONE), - - /* D0: ACCEL1_INT */ - PAD_NC(GPP_D0, NONE), - /* D1: ACCEL2_INT */ - PAD_NC(GPP_D1, NONE), - /* D2: Not Connected */ - PAD_NC(GPP_D2, NONE), - /* D3: Not Connected */ - PAD_NC(GPP_D3, NONE), - /* D4: Not Connected */ - PAD_NC(GPP_D4, NONE), - /* D5: CLKREQ0_M2_SSD_N */ - PAD_NC(GPP_D5, NONE), - /* D6: CLKREQ1_WLAN_N */ - PAD_NC(GPP_D6, NONE), - /* D7: LAN_CLKREQ# */ - PAD_NC(GPP_D7, NONE), - /* D8: Not Connected */ - PAD_NC(GPP_D8, NONE), - /* D9: Not Connected */ - PAD_NC(GPP_D9, NONE), - /* D10: Not Connected */ - PAD_NC(GPP_D10, NONE), - /* D11: Not Connected */ - PAD_NC(GPP_D11, NONE), - /* D12: Not Connected */ - PAD_NC(GPP_D12, NONE), - /* D13: Not Connected */ - PAD_NC(GPP_D13, NONE), - /* D14: Not Connected */ - PAD_NC(GPP_D14, NONE), - /* D15: Not Connected */ - PAD_NC(GPP_D15, NONE), - /* D16: CPU_SSD_PWREN */ - PAD_CFG_GPO(GPP_D16, 1, PLTRST), - /* D17: Not Connected */ - PAD_NC(GPP_D17, NONE), - /* D18: Not Connected */ - PAD_NC(GPP_D18, NONE), - /* D19: GPPC_D_19_WFCAM_PD_N */ - PAD_CFG_TERM_GPO(GPP_D19, 1, UP_20K, DEEP), - - /* E0: SATAXPCIE_0_SATAGP_0 */ - PAD_NC(GPP_E0, NONE), - /* E1: Not Connected */ - PAD_NC(GPP_E1, NONE), - /* E2: Not Connected */ - PAD_NC(GPP_E2, NONE), - /* E3: FPS_INT */ - PAD_CFG_NF(GPP_E3, NONE, DEEP, NF1), - /* E4: Not Connected */ - PAD_NC(GPP_E4, NONE), - /* E5: Not Connected */ - PAD_NC(GPP_E5, NONE), - /* E6: THC0_SPI1_RST_N_TCH_PNL */ - PAD_NC(GPP_E6, NONE), - /* E7: EC_SMI_LP_N */ - PAD_NC(GPP_E7, NONE), - /* E8: EC_SLP_S0IX_N */ - PAD_NC(GPP_E8, NONE), - /* E9: USB2_TCP01_OC_N */ - PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), - /* E10: SPI1_TCH_PNL_CS_N */ - PAD_NC(GPP_E10, NONE), - /* E11: SPI1_CLK */ - PAD_NC(GPP_E11, NONE), - /* E12: Not Connected */ - PAD_NC(GPP_E12, NONE), - /* E13: Not Connected */ - PAD_NC(GPP_E13, NONE), - /* E14: EDP_HPD */ - PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), - /* E15: Not Connected */ - PAD_NC(GPP_E15, NONE), - /* E16: Not Connected */ - PAD_NC(GPP_E16, NONE), - /* E17: Not Connected */ - PAD_NC(GPP_E17, NONE), - /* E18: TBT_LSX0_TXD */ - PAD_NC(GPP_E18, NATIVE), - /* E19: TBT_LSX0_RXD */ - PAD_NC(GPP_E19, NATIVE), - /* E20: Not Connected */ - PAD_NC(GPP_E20, NONE), - /* E21: TBT_LSX1_RXD */ - PAD_NC(GPP_E21, NATIVE), - /* E22: Not Connected */ - PAD_NC(GPP_E22, NONE), - /* E23: Not Connected */ - PAD_NC(GPP_E23, NONE), - - /* F0: CNV_BRI_DT_BT_UART0_RTS_R */ - PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), - /* F1: CNV_BRI_RSP_BT_UART0_RX_R */ - PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1), - /* F2: CNV_RGI_DT_BT_UART0_TX_R */ - PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), - /* F3: CNV_RGI_RSP_BT_UART0_CTS */ - PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1), - /* F4: Not Connected */ - PAD_NC(GPP_F4, NONE), - /* F5: GPPC_F5_MODEM_CLKREQ */ - PAD_NC(GPP_F5, NONE), - /* F6: Not Connected */ - PAD_NC(GPP_F6, NONE), - /* F7: BIOS_REC */ - PAD_CFG_GPO(GPP_F7, 1, PLTRST), - /* F8: Not Connected */ - PAD_NC(GPP_F8, NONE), - /* F9: Not Connected */ - PAD_NC(GPP_F9, NONE), - /* F10: GPPC_F_10 */ - PAD_CFG_GPO(GPP_F10, 0, DEEP), - /* F11: Not Connected */ - PAD_NC(GPP_F11, NONE), - /* F12: Not Connected */ - PAD_NC(GPP_F12, NONE), - /* F13: Not Connected */ - PAD_NC(GPP_F13, NONE), - /* F14: Not Connected */ - PAD_NC(GPP_F14, NONE), - /* F15: Not Connected */ - PAD_NC(GPP_F15, NONE), - /* F16: Not Connected */ - PAD_NC(GPP_F16, NONE), - /* F17: TOUCH_PANEL_RESET_N */ - PAD_NC(GPP_F17, NONE), - /* F18: TOUCH_PANEL_INT_N */ - PAD_NC(GPP_F18, NONE), - /* F19: Not Connected */ - PAD_NC(GPP_F19, NONE), - /* F20: Not Connected */ - PAD_NC(GPP_F20, NONE), - /* F21: Not Connected */ - PAD_NC(GPP_F21, NONE), - /* F22: Not Connected */ - PAD_NC(GPP_F22, NONE), - /* F23: Not Connected */ - PAD_NC(GPP_F23, NONE), - - /* H0: GPPC_H0_M2_SSD_RST_N */ - PAD_CFG_GPO(GPP_H0, 0, DEEP), - /* H1: GPPC_H_1 */ - PAD_CFG_GPO(GPP_H1, 0, DEEP), - /* H2: GPPC_H_2 */ - PAD_CFG_GPO(GPP_H2, 0, DEEP), - /* H3: Not Connected */ - PAD_NC(GPP_H3, NONE), - /* H4: GSENSOR_I2C_SDA */ - PAD_NC(GPP_H4, NONE), - /* H5: GSENSOR_I2C_SCL */ - PAD_NC(GPP_H5, NONE), - /* H6: Not Connected */ - PAD_NC(GPP_H6, NONE), - /* H7: Not Connected */ - PAD_NC(GPP_H7, NONE), - /* H8: Not Connected */ - PAD_NC(GPP_H8, NONE), - /* H9: Not Connected */ - PAD_NC(GPP_H9, NONE), - /* H10: Not Connected */ - PAD_NC(GPP_H10, NONE), - /* H11: Not Connected */ - PAD_NC(GPP_H11, NONE), - /* H12: Not Connected */ - PAD_NC(GPP_H12, NONE), - /* H13: Not Connected */ - PAD_NC(GPP_H13, NONE), - /* H14: Not Connected */ - PAD_NC(GPP_H14, NONE), - /* H15: Not Connected */ - PAD_NC(GPP_H15, NONE), - /* H16: DDIB_DDC_SCL */ - PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1), - /* H17: DDIB_DDC_SDA */ - PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1), - /* H18: CPU_C10_GATE_N */ - PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), - /* H19: UART_BT_WAKE_N */ - PAD_NC(GPP_H19, NONE), - /* H20: Not Connected */ - PAD_NC(GPP_H20, NONE), - /* H21: Not Connected */ - PAD_NC(GPP_H21, NONE), - /* H22: Not Connected */ - PAD_NC(GPP_H22, NONE), - /* H23: Not Connected */ - PAD_NC(GPP_H23, NONE), - - /* R0: HDA_BCLK */ - PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), - /* R1: HDA_SYNC */ - PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), - /* R2: HDA_SDO */ - PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), - /* R3: HDA_SDI_0_SSP0_RXD */ - PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), - /* R4: Not Connected */ - PAD_NC(GPP_R4, NONE), - /* R5: Not Connected */ - PAD_NC(GPP_R5, NONE), - /* R6: Not Connected */ - PAD_NC(GPP_R6, NONE), - /* R7: Not Connected */ - PAD_NC(GPP_R7, NONE), - - /* S0: Not Connected */ - PAD_NC(GPP_S0, NONE), - /* S1: Not Connected */ - PAD_NC(GPP_S1, NONE), - /* S2: Not Connected */ - PAD_NC(GPP_S2, NONE), - /* S3: Not Connected */ - PAD_NC(GPP_S3, NONE), - /* S4: Not Connected */ - PAD_NC(GPP_S4, NONE), - /* S5: Not Connected */ - PAD_NC(GPP_S5, NONE), - /* S6: Not Connected */ - PAD_NC(GPP_S6, NONE), - /* S7: Not Connected */ - PAD_NC(GPP_S7, NONE), - - /* T2: Not Connected */ - PAD_NC(GPP_T2, NONE), - /* T3: Not Connected */ - PAD_NC(GPP_T3, NONE), - - /* U4: Not Connected */ - PAD_NC(GPP_U4, NONE), - /* U5: Not Connected */ - PAD_NC(GPP_U5, NONE), -}; - -const struct pad_config *variant_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(gpio_table); - return gpio_table; -} diff --git a/src/mainboard/starlabs/labtop/variants/tgl/hda_verb.c b/src/mainboard/starlabs/labtop/variants/tgl/hda_verb.c deleted file mode 100644 index 7903d96259..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/hda_verb.c +++ /dev/null @@ -1,211 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/azalia_device.h> - -const u32 cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0256, /* Codec Vendor / Device ID: Realtek ALC256 */ - 0x10ec1200, /* Subsystem ID */ - 38, /* Number of jacks (NID entries) */ - - /* Reset Codec First */ - AZALIA_RESET(0x1), - - /* HDA Codec Subsystem ID: 0x10EC1200 */ - AZALIA_SUBVENDOR(0, 0x10ec1200), - - /* Pin Widget Verb-table */ - AZALIA_PIN_CFG(0, 0x01, 0x00000000), - AZALIA_PIN_CFG(0, 0x12, 0x90a61120), - AZALIA_PIN_CFG(0, 0x13, 0x40000000), - AZALIA_PIN_CFG(0, 0x14, 0x90171110), - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - AZALIA_PIN_CFG(0, 0x19, 0x04ab1020), - AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), - AZALIA_PIN_CFG(0, 0x1b, 0x40700001), - AZALIA_PIN_CFG(0, 0x1d, 0x411111f0), - AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), - AZALIA_PIN_CFG(0, 0x21, 0x042b1010), - - /* Reset to D0 */ - 0x00170500, - 0x00170500, - 0x00170500, - 0x00170500, - - /* Reset Register */ - 0x0205001A, - 0x02048003, - 0x0205001A, - 0x0204C003, - - /* ALC256 Default 1 */ - 0x0205003C, - 0x02040354, - 0x0205003C, - 0x02040314, - - /* ALC256 Default 2 */ - 0x02050040, - 0x02049800, - 0x02050034, - 0x0204023C, - - /* ALC256 Default 3 */ - 0x05750003, - 0x05740DA3, - 0x02050046, - 0x02040004, - - /* ALC256 Default 4 */ - 0x0205001B, - 0x02040A4B, - 0x02050008, - 0x02046A6C, - - /* Jack Detection */ - 0x02050009, - 0x0204E003, - 0x0205000A, - 0x02047770, - - /* Combo Jack TRS setting */ - 0x02050038, - 0x02047901, - - /* Disable Microphone Security */ - 0x0205000D, - 0x0204A020, - - /* Enable ADC clock */ - 0x02050005, - 0x02040700, - - /* Speaker Enable */ - 0x0205000C, - 0x020401EF, - - /* - * Equalizer: - * - * AGC - * Threshold: - 6.00 dB - * Front Boost: + 6.00 dB - * Post Boost: + 6.00 dB - * - * Low Pass Filter - * Boost Gain: Enabled - * BW: 200Hz - * Gain: + 4.00 dB - * - * Band Pass Filter 1 - * Fc: 240Hz - * BW: 400Hz - * Gain: - 4.00 dB - * - * Band Pass Filter 2 - * Fc: 16000Hz - * BW: 1000Hz - * Gain: + 12.00 dB - * - * High Pass Filter - * Boost Gain: Enabled - * BW: 200Hz - * Gain: - 4.00 dB - * - * Class D Amp - * Power: 2.5W - * Resistance: 4ohms - * - * EQ Output - * Left: + 0.00 dB - * Right: + 0.00 dB - * - * VARQ - * Q: 0.707 - */ - - 0x05350000, - 0x053404DA, - 0x0535001d, - 0x05340800, - - 0x0535001e, - 0x05340800, - 0x05350003, - 0x05341F7A, - - 0x05350004, - 0x0534FA18, - 0x0535000F, - 0x0534C295, - - 0x05350010, - 0x05341D73, - 0x05350011, - 0x0534FA18, - - 0x05350012, - 0x05341E08, - 0x05350013, - 0x05341C10, - - 0x05350014, - 0x05342FB2, - 0x0535001B, - 0x05341F2C, - - 0x0535001C, - 0x0534095C, - 0x05450000, - 0x05440000, - - 0x0545001d, - 0x05440800, - 0x0545001e, - 0x05440800, - - 0x05450003, - 0x05441F7A, - 0x05450004, - 0x0544FA18, - - 0x0545000F, - 0x0544C295, - 0x05450010, - 0x05441D73, - - 0x05450011, - 0x0544FA18, - 0x05450012, - 0x05441E08, - - 0x05450013, - 0x05441C10, - 0x05450014, - 0x05442FB2, - - 0x0545001B, - 0x05441F2C, - 0x0545001C, - 0x0544095C, - - 0x05350000, - 0x0534C4DA, - 0x02050038, - 0x02044901, - - 0x02050013, - 0x0204422F, - 0x02050016, - 0x02044E50, - - 0x02050012, - 0x0204EBC4, - 0x02050020, - 0x020451FF, -}; - -const u32 pc_beep_verbs[] = {}; - -AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/starlabs/labtop/variants/tgl/romstage.c b/src/mainboard/starlabs/labtop/variants/tgl/romstage.c deleted file mode 100644 index 41e7f6dc4d..0000000000 --- a/src/mainboard/starlabs/labtop/variants/tgl/romstage.c +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <option.h> -#include <soc/meminit.h> -#include <soc/romstage.h> -#include <types.h> - -void mainboard_memory_init_params(FSPM_UPD *mupd) -{ - const struct mb_cfg mem_config = { - .type = MEM_TYPE_DDR4, - }; - - const bool half_populated = false; - - const struct mem_spd ddr4_spd_info = { - .topo = MEM_TOPO_DIMM_MODULE, - .smbus = { - [0] = { - .addr_dimm[0] = 0x50, - }, - [1] = { - .addr_dimm[0] = 0x52, - }, - }, - }; - - memcfg_init(mupd, &mem_config, &ddr4_spd_info, half_populated); - - const uint8_t vtd = get_uint_option("vtd", 1); - mupd->FspmConfig.VtdDisable = !vtd; - - /* Enable/Disable Thunderbolt based on CMOS settings */ - if (get_uint_option("thunderbolt", 1) == 0) { - mupd->FspmConfig.VtdItbtEnable = 0; - mupd->FspmConfig.VtdBaseAddress[3] = 0; - mupd->FspmConfig.TcssDma0En = 0; - mupd->FspmConfig.TcssItbtPcie0En = 0; - } -}; |