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-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb2
7 files changed, 0 insertions, 14 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
index dad319e9ff..a08f053d8c 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/apollolake
- device cpu_cluster 0 on end
-
register "sci_irq" = "SCIS_IRQ10"
# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
index b728438ed8..b515170ad0 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/apollolake
- device cpu_cluster 0 on end
-
register "sci_irq" = "SCIS_IRQ10"
# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
index 4fae59e38f..56d93aa30d 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/apollolake
- device cpu_cluster 0 on end
-
register "sci_irq" = "SCIS_IRQ10"
# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
index 586d65e434..1c5f7970ef 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/apollolake
- device cpu_cluster 0 on end
-
register "sci_irq" = "SCIS_IRQ10"
# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
index 40739df913..92bba65047 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/apollolake
- device cpu_cluster 0 on end
-
register "sci_irq" = "SCIS_IRQ10"
# EMMC TX DATA Delay 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
index c48eb5a030..8223f68bab 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/apollolake
- device cpu_cluster 0 on end
-
register "sci_irq" = "SCIS_IRQ10"
# 0:HS400(Default), 1:HS200, 2:DDR50
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb
index ce716a0c83..0a080c3a63 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl7/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/apollolake
- device cpu_cluster 0 on end
-
register "sci_irq" = "SCIS_IRQ10"
# EMMC TX DATA Delay 1