diff options
Diffstat (limited to 'src/mainboard/siemens')
6 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb index a08f053d8c..5d4acd85ab 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb @@ -69,8 +69,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "DisableSataSalpSupport" = "1" end device pci 13.0 on # - RP 2 - PCIe A 0 - MACPHY diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index 129149711f..7054413305 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -67,8 +67,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "sata_ports_ssd[0]" = "1" register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb index 56d93aa30d..472f5baddc 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb @@ -64,8 +64,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "DisableSataSalpSupport" = "1" end device pci 13.0 on # - RP 2 - PCIe A 0 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb index 1c5f7970ef..baaff1e960 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb @@ -58,8 +58,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "DisableSataSalpSupport" = "1" end device pci 13.0 on # - RP 2 - PCIe A 0 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index b308ab2519..52fcd49df6 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -67,8 +67,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "sata_ports_ssd[0]" = "1" register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index 1885e817f0..dc66be63bd 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -38,8 +38,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "sata_ports_ssd[0]" = "1" register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" |