diff options
Diffstat (limited to 'src/mainboard/siemens/mc_apl1/variants/mc_apl3')
| -rw-r--r-- | src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index 07fa01d707..8b1a0e169f 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -22,7 +22,6 @@ void variant_mainboard_final(void) { struct device *dev = NULL; - uint16_t cmd = 0; /* PIR6 register mapping for PCIe root ports * INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#-> PIRQC# @@ -43,9 +42,7 @@ void variant_mainboard_final(void) /* Set Master Enable for on-board PCI device. */ dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); if (dev) { - cmd = pci_read_config16(dev, PCI_COMMAND); - cmd |= PCI_COMMAND_MASTER; - pci_write_config16(dev, PCI_COMMAND, cmd); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); /* Disable clock outputs 0 and 2-4 (CLKOUT) for upstream * XIO2001 PCIe to PCI Bridge. |