aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/sapphire/pureplatinumh61/romstage.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/sapphire/pureplatinumh61/romstage.c')
-rw-r--r--src/mainboard/sapphire/pureplatinumh61/romstage.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c
index a20a1f758b..da825a9dc1 100644
--- a/src/mainboard/sapphire/pureplatinumh61/romstage.c
+++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c
@@ -17,21 +17,14 @@
#include <stdint.h>
#include <string.h>
#include <lib.h>
-#include <timestamp.h>
#include <arch/byteorder.h>
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <arch/acpi.h>
-#include <console/console.h>
-#include "northbridge/intel/sandybridge/sandybridge.h"
-#include "northbridge/intel/sandybridge/raminit_native.h"
-#include "southbridge/intel/bd82x6x/pch.h"
-#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
-#include <cpu/x86/msr.h>
-#include <delay.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
void pch_enable_lpc(void)
{