4 files changed, 10 insertions, 12 deletions
diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig
index 7c9dce4ba7..fed4610533 100644
--- a/src/mainboard/samsung/lumpy/Kconfig
+++ b/src/mainboard/samsung/lumpy/Kconfig
@@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SYSTEM_TYPE_LAPTOP
 	select BOARD_ROMSIZE_KB_8192
 	select MAINBOARD_HAS_CHROMEOS
+	select MAINBOARD_HAS_LPC_TPM
 	select CPU_INTEL_SOCKET_RPGA989
 	select EC_SMSC_MEC1308
 	select HAVE_ACPI_RESUME
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 9b1a023bfd..ce064bbe8b 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -32,6 +32,7 @@
 #include <cbmem.h>
 #include <console/console.h>
 #include <bootmode.h>
+#include <tpm.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <southbridge/intel/bd82x6x/pch.h>
@@ -45,9 +46,6 @@
 #if CONFIG_DRIVERS_UART_8250IO
 #include <superio/smsc/lpc47n207/lpc47n207.h>
 #endif
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/chromeos.h>
-#endif
 
 static void pch_enable_lpc(void)
 {
@@ -273,8 +271,8 @@ void main(unsigned long bist)
 	}
 	northbridge_romstage_finalize(boot_mode==2);
 	post_code(0x3f);
-#if CONFIG_CHROMEOS
-	init_chromeos(boot_mode);
-#endif
+	if (CONFIG_LPC_TPM) {
+		init_tpm(boot_mode == 2);
+	}
 	timestamp_add_now(TS_END_ROMSTAGE);
 }
diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig
index 1eda8eb569..f749c3972f 100644
--- a/src/mainboard/samsung/stumpy/Kconfig
+++ b/src/mainboard/samsung/stumpy/Kconfig
@@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select BOARD_ROMSIZE_KB_8192
 	select MAINBOARD_HAS_CHROMEOS
+	select MAINBOARD_HAS_LPC_TPM
 	select CPU_INTEL_SOCKET_RPGA989
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index 6506c80a60..161c8d1f2d 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -41,13 +41,11 @@
 #include <cpu/x86/bist.h>
 #include <cpu/x86/msr.h>
 #include <halt.h>
+#include <tpm.h>
 #include "gpio.h"
 #if CONFIG_DRIVERS_UART_8250IO
 #include <superio/smsc/lpc47n207/lpc47n207.h>
 #endif
-#if CONFIG_CHROMEOS
-#include <vendorcode/google/chromeos/chromeos.h>
-#endif
 
 /* Stumpy USB Reset Disable defined in cmos.layout */
 #if CONFIG_USE_OPTION_TABLE
@@ -283,8 +281,8 @@ void main(unsigned long bist)
 	northbridge_romstage_finalize(boot_mode==2);
 
 	post_code(0x3f);
-#if CONFIG_CHROMEOS
-	init_chromeos(boot_mode);
-#endif
+	if (CONFIG_LPC_TPM) {
+		init_tpm(boot_mode == 2);
+	}
 	timestamp_add_now(TS_END_ROMSTAGE);
 }