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Diffstat (limited to 'src/mainboard/samsung/stumpy/chromeos.c')
-rw-r--r--src/mainboard/samsung/stumpy/chromeos.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c
index 5f2a062065..96d2b125d7 100644
--- a/src/mainboard/samsung/stumpy/chromeos.c
+++ b/src/mainboard/samsung/stumpy/chromeos.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
+#include <vendorcode/google/chromeos/chromeos.h>
#define GPIO_SPI_WP 68
#define GPIO_REC_MODE 42
@@ -132,3 +133,14 @@ void init_bootmode_straps(void)
pci_write_config32(PCI_DEV(0, 0x1f, 2), SATA_SP, flags);
#endif
}
+
+static const struct cros_gpio cros_gpios[] = {
+ CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME),
+ CROS_GPIO_DEV_AH(GPIO_DEV_MODE, CROS_GPIO_DEVICE_NAME),
+ CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME),
+};
+
+void mainboard_chromeos_acpi_generate(void)
+{
+ chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
+}