6 files changed, 13 insertions, 15 deletions
diff --git a/src/mainboard/roda/rk886ex/acpi_tables.c b/src/mainboard/roda/rk886ex/acpi_tables.c
index 30c479c513..be5adf226a 100644
--- a/src/mainboard/roda/rk886ex/acpi_tables.c
+++ b/src/mainboard/roda/rk886ex/acpi_tables.c
@@ -31,13 +31,14 @@
 #include "dmi.h"
 
 extern unsigned char AmlCode[];
+void *amlcodeptr = &AmlCode;
 #if CONFIG_HAVE_ACPI_SLIC
 unsigned long acpi_create_slic(unsigned long current);
 #endif
 
 #define OLD_ACPI 0
 #if OLD_ACPI
-void acpi_create_gnvs(global_nvs_t *gnvs)
+static void acpi_create_gnvs(global_nvs_t *gnvs)
 {
 	memset (gnvs, 0, sizeof(global_nvs_t));
 
@@ -91,7 +92,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 #endif
 
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
-void acpi_create_gnvs(global_nvs_t *gnvs)
+static void acpi_create_gnvs(global_nvs_t *gnvs)
 {
 	memset((void *)gnvs, 0, sizeof(*gnvs));
 	gnvs->apic = 1;
@@ -110,7 +111,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->did[4] = 0x00000005;
 }
 
-void acpi_create_intel_hpet(acpi_hpet_t * hpet)
+static void acpi_create_intel_hpet(acpi_hpet_t * hpet)
 {
 #define HPET_ADDR  0xfed00000ULL
 	acpi_header_t *header = &(hpet->header);
@@ -272,10 +273,10 @@ unsigned long write_acpi_tables(unsigned long start)
 	ALIGN_CURRENT;
 	acpi_create_facs(facs);
 
+	int len = ((acpi_header_t *)amlcodeptr)->length;
+	current += len;
 	dsdt = (acpi_header_t *) current;
-	current += ((acpi_header_t *) AmlCode)->length;
-	memcpy((void *) dsdt, (void *) AmlCode,
-	       ((acpi_header_t *) AmlCode)->length);
+	memcpy((void *) dsdt, amlcodeptr, len);
 
 	/* Fix up global NVS region for SMI handler. The GNVS region lives 
 	 * in the (high) table area. The low memory map looks like this:
diff --git a/src/mainboard/roda/rk886ex/m3885.c b/src/mainboard/roda/rk886ex/m3885.c
index 418f43f5de..62752e9065 100644
--- a/src/mainboard/roda/rk886ex/m3885.c
+++ b/src/mainboard/roda/rk886ex/m3885.c
@@ -275,7 +275,6 @@ void m3885_configure_multikey(void)
 	maxvars = m3885_get_variable(0x00);
 	printk(BIOS_DEBUG, "M388x has %d variables in original bank.\n", maxvars);
 	for (i=0; i<ARRAY_SIZE(variables); i+=3) {
-		u8 reg8;
 		if(variables[i + 0] > maxvars)
 			continue;
 		reg8 = m3885_get_variable(variables[i + 0]);
diff --git a/src/mainboard/roda/rk886ex/mainboard.c b/src/mainboard/roda/rk886ex/mainboard.c
index 1594241c23..f23a15932e 100644
--- a/src/mainboard/roda/rk886ex/mainboard.c
+++ b/src/mainboard/roda/rk886ex/mainboard.c
@@ -27,6 +27,7 @@
 #if CONFIG_PCI_OPTION_ROM_RUN_YABEL
 #include <x86emu/x86emu.h>
 #endif
+#include <arch/coreboot_tables.h>
 #include "chip.h"
 
 #include "ec.h"
@@ -133,8 +134,6 @@ static void mainboard_enable(device_t dev)
 #endif
 }
 
-int add_northbridge_resources(struct lb_memory *mem);
-
 int add_mainboard_resources(struct lb_memory *mem)
 {
 	return add_northbridge_resources(mem);
diff --git a/src/mainboard/roda/rk886ex/mainboard_smi.c b/src/mainboard/roda/rk886ex/mainboard_smi.c
index dc1a7a7d08..947f642802 100644
--- a/src/mainboard/roda/rk886ex/mainboard_smi.c
+++ b/src/mainboard/roda/rk886ex/mainboard_smi.c
@@ -22,6 +22,7 @@
 #include <arch/io.h>
 #include <arch/romcc_io.h>
 #include <console/console.h>
+#include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
 /* The southbridge SMI handler checks whether gnvs has a 
diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c
index 1186c3242b..c9de525d11 100644
--- a/src/mainboard/roda/rk886ex/mptable.c
+++ b/src/mainboard/roda/rk886ex/mptable.c
@@ -27,7 +27,7 @@
 #include <string.h>
 #include <stdint.h>
 
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
 {
         static const char sig[4] = "PCMP";
         static const char oem[8] = "COREBOOT";
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index 4052c3277a..da196a9d5d 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -79,9 +79,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 	return smbus_read_byte(device, address);
 }
 
+
 #include "northbridge/intel/i945/raminit.h"
 #include "northbridge/intel/i945/raminit.c"
-#include "northbridge/intel/i945/reset_test.c"
 #include "northbridge/intel/i945/errata.c"
 #include "northbridge/intel/i945/debug.c"
 
@@ -259,8 +259,6 @@ static void early_ich7_init(void)
 	RCBA32(0x2034) = reg32;
 }
 
-#include "southbridge/intel/i82801gx/cmos_failover.c"
-
 static void init_artec_dongle(void)
 {
 	// Enable 4MB decoding
@@ -277,6 +275,7 @@ static void init_artec_dongle(void)
 // __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
 //
 #include "lib/cbmem.c"
+#include "cpu/intel/model_6ex/cache_as_ram_disable.c"
 
 void real_main(unsigned long bist)
 {
@@ -391,7 +390,7 @@ void real_main(unsigned long bist)
 		 * day.
 		 */
 		if (resume_backup_memory) 
-			memcpy(resume_backup_memory, CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
+			memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
 		/* Magic for S3 resume */
 		pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
@@ -399,4 +398,3 @@ void real_main(unsigned long bist)
 #endif
 }
 
-#include "cpu/intel/model_6ex/cache_as_ram_disable.c"