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path: root/src/mainboard/rca/rm4100/romstage.c
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Diffstat (limited to 'src/mainboard/rca/rm4100/romstage.c')
-rw-r--r--src/mainboard/rca/rm4100/romstage.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/rca/rm4100/romstage.c b/src/mainboard/rca/rm4100/romstage.c
index 2f3892e3a0..cf7464442d 100644
--- a/src/mainboard/rca/rm4100/romstage.c
+++ b/src/mainboard/rca/rm4100/romstage.c
@@ -35,8 +35,8 @@
#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
#include "northbridge/intel/i82830/raminit.h"
#include "northbridge/intel/i82830/memory_initialized.c"
-#include "southbridge/intel/i82801xx/i82801xx.h"
-#include "southbridge/intel/i82801xx/i82801xx_reset.c"
+#include "southbridge/intel/i82801dx/i82801dx.h"
+#include "southbridge/intel/i82801dx/i82801dx_reset.c"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
#include "spd_table.h"
@@ -44,7 +44,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
-#include "southbridge/intel/i82801xx/i82801xx_early_smbus.c"
+#include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
/**
* The onboard 64MB PC133 memory does not have a SPD EEPROM so the
@@ -127,4 +127,4 @@ static void main(unsigned long bist)
/* Check RAM. */
/* ram_check(0, 640 * 1024); */
/* ram_check(64512 * 1024, 65536 * 1024); */
-} \ No newline at end of file
+}