diff options
Diffstat (limited to 'src/mainboard/purism/librem_bdw/variants')
| -rw-r--r-- | src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb | 18 | ||||
| -rw-r--r-- | src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb | 18 |
2 files changed, 20 insertions, 16 deletions
diff --git a/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb b/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb index d3d0ae72d0..237e6979ec 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb +++ b/src/mainboard/purism/librem_bdw/variants/librem13v1/overridetree.cb @@ -1,14 +1,16 @@ chip soc/intel/broadwell - # Port 0 is HDD - # Port 3 is M.2 NGFF - register "sata_port_map" = "0x9" + device domain 0 on +# chip soc/intel/broadwell/pch + # Port 0 is HDD + # Port 3 is M.2 NGFF + register "sata_port_map" = "0x9" - # Port tuning for link stability - register "sata_port0_gen3_dtle" = "9" - register "sata_port3_gen3_dtle" = "9" + # Port tuning for link stability + register "sata_port0_gen3_dtle" = "9" + register "sata_port3_gen3_dtle" = "9" - device domain 0 on - device pci 1c.2 on end # PCIe Port #3 - LAN + device pci 1c.2 on end # PCIe Port #3 - LAN +# end end end diff --git a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb index c0c8d0360f..b9b29cd6ff 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb +++ b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb @@ -1,14 +1,16 @@ chip soc/intel/broadwell - # Port 0 is HDD - # Port 1 is M.2 NGFF - register "sata_port_map" = "0x3" + device domain 0 on +# chip soc/intel/broadwell/pch + # Port 0 is HDD + # Port 1 is M.2 NGFF + register "sata_port_map" = "0x3" - # Port tuning for link stability - register "sata_port0_gen3_dtle" = "7" - register "sata_port1_gen3_dtle" = "9" + # Port tuning for link stability + register "sata_port0_gen3_dtle" = "7" + register "sata_port1_gen3_dtle" = "9" - device domain 0 on - device pci 1d.0 on end # USB2 EHCI + device pci 1d.0 on end # USB2 EHCI +# end end end |