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-rw-r--r--src/mainboard/protectli/vault_bsw/devicetree.cb4
-rw-r--r--src/mainboard/protectli/vault_kbl/devicetree.cb4
2 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/protectli/vault_bsw/devicetree.cb b/src/mainboard/protectli/vault_bsw/devicetree.cb
index 4b750c00f0..02a1642092 100644
--- a/src/mainboard/protectli/vault_bsw/devicetree.cb
+++ b/src/mainboard/protectli/vault_bsw/devicetree.cb
@@ -79,9 +79,7 @@ chip soc/intel/braswell
# Enable SERIRQ continuous
register "serirq_mode" = "SERIRQ_CONTINUOUS"
- device cpu_cluster 0 on
- device lapic 0 on end
- end
+ device cpu_cluster 0 on end
device domain 0 on
device pci 00.0 on end # 8086 2280 - SoC transaction router
device pci 02.0 on end # 8086 22b0/22b1 - B1/C0 stepping GFX
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index feb8b9f1e3..4e4cbac04a 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -189,9 +189,7 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoDisabled, \
}"
- device cpu_cluster 0 on
- device lapic 0 on end
- end
+ device cpu_cluster 0 on end
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device