diff options
Diffstat (limited to 'src/mainboard/pcengines/apu2/spd/HYNIX-4G-1333-ECC.spd.hex')
-rw-r--r-- | src/mainboard/pcengines/apu2/spd/HYNIX-4G-1333-ECC.spd.hex | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/src/mainboard/pcengines/apu2/spd/HYNIX-4G-1333-ECC.spd.hex b/src/mainboard/pcengines/apu2/spd/HYNIX-4G-1333-ECC.spd.hex index ac6b4c6c9d..adc5438815 100644 --- a/src/mainboard/pcengines/apu2/spd/HYNIX-4G-1333-ECC.spd.hex +++ b/src/mainboard/pcengines/apu2/spd/HYNIX-4G-1333-ECC.spd.hex @@ -1,4 +1,4 @@ -# HYNIX-4GBYTE-1333 The H9 N0 SPD delivered by Hynix +# HYNIX-4GBYTE-1333 The H9 N0 SPD delivered by Hynix # SPD contents for APU 4GB DDR3 ECC (1333MHz PC1333) soldered down # 0 Number of SPD Bytes used / Total SPD Size / CRC Coverage @@ -102,7 +102,7 @@ 30 # 20 Minimum Row Precharge Delay Time (tRPmin) -# 0x6C = 13.5ns - +# 0x6C = 13.5ns - # 0x69 = 13.125 ns - DDR3-1333 69 @@ -186,7 +186,7 @@ 86 # 42 - 47 (reserved) -00 00 00 00 00 00 +00 00 00 00 00 00 # 48 - 55 (reserved) 00 00 00 00 00 00 00 00 @@ -208,7 +208,7 @@ # bits[4:0]: 0 = Reference Raw card A used # bits[6:5]: 0 = revision 0 # bit7 : 0 = Reference raw cards A through AL -# revision B4 +# revision B4 61 # 63 Address Mapping from Edge Connector to DRAM @@ -255,7 +255,3 @@ # 126 - 127: Cyclical Redundancy Code 67 94 - - - - |