aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/pcengines/apu2/OemCustomize.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/pcengines/apu2/OemCustomize.c')
-rw-r--r--src/mainboard/pcengines/apu2/OemCustomize.c20
1 files changed, 5 insertions, 15 deletions
diff --git a/src/mainboard/pcengines/apu2/OemCustomize.c b/src/mainboard/pcengines/apu2/OemCustomize.c
index 78ff99459c..7d943c8bdf 100644
--- a/src/mainboard/pcengines/apu2/OemCustomize.c
+++ b/src/mainboard/pcengines/apu2/OemCustomize.c
@@ -4,16 +4,6 @@
#include <AGESA.h>
#include <northbridge/amd/agesa/state_machine.h>
-#define PCIE_NIC_RESET_ID 1
-
-#if CONFIG(BOARD_PCENGINES_APU2)
-#define PCIE_GFX_RESET_ID 55
-#define PCIE_PORT3_RESET_ID 51
-#else
-#define PCIE_GFX_RESET_ID PCIE_NIC_RESET_ID
-#define PCIE_PORT3_RESET_ID PCIE_NIC_RESET_ID
-#endif
-
static const PCIe_PORT_DESCRIPTOR PortList[] = {
{
0,
@@ -23,7 +13,7 @@ static const PCIe_PORT_DESCRIPTOR PortList[] = {
PcieGenMaxSupported,
PcieGenMaxSupported,
AspmL0sL1,
- PCIE_PORT3_RESET_ID,
+ 0x01,
0)
},
/* Initialize Port descriptor (PCIe port, Lanes 1, PCI Device Number 2, ...) */
@@ -35,7 +25,7 @@ static const PCIe_PORT_DESCRIPTOR PortList[] = {
PcieGenMaxSupported,
PcieGenMaxSupported,
AspmL0sL1,
- PCIE_NIC_RESET_ID,
+ 0x02,
0)
},
/* Initialize Port descriptor (PCIe port, Lanes 2, PCI Device Number 2, ...) */
@@ -47,7 +37,7 @@ static const PCIe_PORT_DESCRIPTOR PortList[] = {
PcieGenMaxSupported,
PcieGenMaxSupported,
AspmL0sL1,
- PCIE_NIC_RESET_ID,
+ 0x03,
0)
},
/* Initialize Port descriptor (PCIe port, Lanes 3, PCI Device Number 2, ...) */
@@ -59,7 +49,7 @@ static const PCIe_PORT_DESCRIPTOR PortList[] = {
PcieGenMaxSupported,
PcieGenMaxSupported,
AspmL0sL1,
- PCIE_NIC_RESET_ID,
+ 0x04,
0)
},
/* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device Number 4, ...) */
@@ -71,7 +61,7 @@ static const PCIe_PORT_DESCRIPTOR PortList[] = {
PcieGenMaxSupported,
PcieGenMaxSupported,
AspmL0sL1,
- PCIE_GFX_RESET_ID,
+ 0x05,
0)
}
};