diff options
Diffstat (limited to 'src/mainboard/pcengines/apu1/romstage.c')
| -rw-r--r-- | src/mainboard/pcengines/apu1/romstage.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c index ab48943c55..89bf3049d6 100644 --- a/src/mainboard/pcengines/apu1/romstage.c +++ b/src/mainboard/pcengines/apu1/romstage.c @@ -15,8 +15,8 @@ * GNU General Public License for more details. */ +#include <amdblocks/acpimmio.h> #include <northbridge/amd/agesa/state_machine.h> -#include <southbridge/amd/cimx/cimx_util.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct5104d/nct5104d.h> #include "gpio_ftns.h" @@ -33,16 +33,16 @@ static void early_lpc_init(void) * controlled in PM_REG 5Bh register. "Always Power On" works by writing a * value of 05h. */ - u8 bdata = pm_ioread(SB_PMIOA_REG5B); + u8 bdata = pm_read8(SB_PMIOA_REG5B); bdata &= 0xf8; //clear bits 0-2 bdata |= 0x05; //set bits 0,2 - pm_iowrite(SB_PMIOA_REG5B, bdata); + pm_write8(SB_PMIOA_REG5B, bdata); /* Multi-function pins switch to GPIO0-35, these pins are shared with PCI pins */ - bdata = pm_ioread(SB_PMIOA_REGEA); + bdata = pm_read8(SB_PMIOA_REGEA); bdata &= 0xfe; //clear bit 0 bdata |= 0x01; //set bit 0 - pm_iowrite(SB_PMIOA_REGEA, bdata); + pm_write8(SB_PMIOA_REGEA, bdata); //configure required GPIOs mmio_base = find_gpio_base(); |