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-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 40a2df7448..daaf84550d 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -19,9 +19,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#define ASSEMBLY 1
-
-
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
@@ -146,7 +143,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
-
static void sio_setup(void)
{
@@ -212,7 +208,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
-
#if CONFIG_USBDEBUG_DIRECT
mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
early_usbdebug_direct_init();