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-rw-r--r--src/mainboard/nvidia/l1_2pvv/Config.lb4
-rw-r--r--src/mainboard/nvidia/l1_2pvv/Options.lb4
-rw-r--r--src/mainboard/nvidia/l1_2pvv/mainboard.c2
3 files changed, 1 insertions, 9 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/Config.lb b/src/mainboard/nvidia/l1_2pvv/Config.lb
index c30dbcdee5..bb1b99b113 100644
--- a/src/mainboard/nvidia/l1_2pvv/Config.lb
+++ b/src/mainboard/nvidia/l1_2pvv/Config.lb
@@ -252,9 +252,7 @@ end
##
## Include the secondary Configuration files
##
-if CONFIG_CHIP_NAME
- config chip.h
-end
+config chip.h
chip northbridge/amd/amdk8/root_complex
device apic_cluster 0 on
diff --git a/src/mainboard/nvidia/l1_2pvv/Options.lb b/src/mainboard/nvidia/l1_2pvv/Options.lb
index 2ef8f68c5c..9362b5f7a5 100644
--- a/src/mainboard/nvidia/l1_2pvv/Options.lb
+++ b/src/mainboard/nvidia/l1_2pvv/Options.lb
@@ -79,7 +79,6 @@ uses CROSS_COMPILE
uses CC
uses HOSTCC
uses OBJCOPY
-uses CONFIG_CHIP_NAME
uses CONFIG_CONSOLE_VGA
uses CONFIG_USBDEBUG_DIRECT
uses CONFIG_PCI_ROM_RUN
@@ -193,9 +192,6 @@ default ENABLE_APIC_EXT_ID=0
default APIC_ID_OFFSET=0x10
default LIFT_BSP_APIC_ID=1
-#CHIP_NAME ?
-default CONFIG_CHIP_NAME=1
-
#memory hole size, 0 mean disable, others will enable the hole, at that case if it is small than mmio_basek, it will use mmio_basek instead.
#2G
#default HW_MEM_HOLE_SIZEK=0x200000
diff --git a/src/mainboard/nvidia/l1_2pvv/mainboard.c b/src/mainboard/nvidia/l1_2pvv/mainboard.c
index 5fa84b0daf..697fc7ce1d 100644
--- a/src/mainboard/nvidia/l1_2pvv/mainboard.c
+++ b/src/mainboard/nvidia/l1_2pvv/mainboard.c
@@ -26,8 +26,6 @@
#include <device/pci_ops.h>
#include "chip.h"
-#if CONFIG_CHIP_NAME == 1
struct chip_operations mainboard_ops = {
CHIP_NAME("NVIDIA l1_2pvv Mainboard")
};
-#endif