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-rw-r--r--src/mainboard/nvidia/l1_2pvv/get_bus_conf.c3
-rw-r--r--src/mainboard/nvidia/l1_2pvv/romstage.c11
2 files changed, 1 insertions, 13 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c b/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c
index 838373ace3..e5380d77b8 100644
--- a/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c
+++ b/src/mainboard/nvidia/l1_2pvv/get_bus_conf.c
@@ -92,11 +92,9 @@ static unsigned get_hcid(unsigned i)
void get_bus_conf(void)
{
-
unsigned apicid_base;
struct mb_sysconf_t *m;
- device_t dev;
int i, j;
if (get_bus_conf_done)
@@ -160,5 +158,4 @@ void get_bus_conf(void)
#endif
m->apicid_mcp55 = apicid_base+0;
m->apicid_mcp55b = apicid_base+1;
-
}
diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
index 78afa3999d..58bf5c2958 100644
--- a/src/mainboard/nvidia/l1_2pvv/romstage.c
+++ b/src/mainboard/nvidia/l1_2pvv/romstage.c
@@ -83,10 +83,6 @@
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-static void memreset_setup(void)
-{
-}
-
static void memreset(int controllers, const struct mem_controller *ctrl)
{
}
@@ -102,12 +98,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdk8/amdk8_f.h"
-#include "northbridge/amd/amdk8/coherent_ht.c"
-
#include "northbridge/amd/amdk8/incoherent_ht.c"
-
+#include "northbridge/amd/amdk8/coherent_ht.c"
#include "northbridge/amd/amdk8/raminit_f.c"
-
#include "lib/generic_sdram.c"
#include "resourcemap.c"
@@ -274,8 +267,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_smbus();
- memreset_setup();
-
//do we need apci timer, tsc...., only debug need it for better output
/* all ap stopped? */
// init_timer(); // Need to use TMICT to synconize FID/VID