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-rw-r--r--src/mainboard/msi/ms9185/romstage.c77
-rw-r--r--src/mainboard/msi/ms9282/romstage.c72
2 files changed, 27 insertions, 122 deletions
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index 4903b3edd7..1696ac9e2c 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -153,73 +153,10 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/fidvid.c"
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
#include "northbridge/amd/amdk8/early_ht.c"
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-
- /* Is this a cpu only reset? Is this a secondary cpu? */
- if ((cpu_init_detectedx) || (!boot_cpu())) {
- if (last_boot_normal()) { // RTC already inited
- goto normal_image;
- } else {
- goto fallback_image;
- }
- }
- /* Nothing special needs to be done to find bus 0 */
- /* Allow the HT devices to be found */
-
- enumerate_ht_chain();
-
- bcm5785_enable_rom();
-
- bcm5785_enable_lpc();
-
- //enable RTC
- pc87417_enable_dev(RTC_DEV);
-
- /* Is this a deliberate reset by the bios */
-// post_code(0x22);
- if (bios_reset_detected() && last_boot_normal()) {
- goto normal_image;
- }
- /* This is the primary cpu how should I boot? */
- else if (do_normal_boot()) {
- goto normal_image;
- }
- else {
- goto fallback_image;
- }
- normal_image:
-// post_code(0x23);
- __asm__ volatile ("jmp __normal_image"
- : /* outputs */
- : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
- );
-
- fallback_image:
-// post_code(0x25);
- ;
-
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
- failover_process(bist, cpu_init_detectedx);
-#endif
- real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
static const uint16_t spd_addr[] = {
//first node
RC0|DIMM0, RC0|DIMM2, RC0|DIMM4, RC0|DIMM6,
@@ -237,6 +174,20 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
int needs_reset;
unsigned bsp_apicid = 0;
+ if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+ /* Nothing special needs to be done to find bus 0 */
+ /* Allow the HT devices to be found */
+
+ enumerate_ht_chain();
+
+ bcm5785_enable_rom();
+
+ bcm5785_enable_lpc();
+
+ //enable RTC
+ pc87417_enable_dev(RTC_DEV);
+ }
+
if (bist == 0) {
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
}
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index b552788a54..5e67feb4c0 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -133,8 +133,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
@@ -156,68 +154,12 @@ static void sio_setup(void)
}
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
- unsigned last_boot_normal_x = last_boot_normal();
-
- /* Is this a cpu only reset? or Is this a secondary cpu? */
- if ((cpu_init_detectedx) || (!boot_cpu())) {
- if (last_boot_normal_x) {
- goto normal_image;
- } else {
- goto fallback_image;
- }
- }
-
- /* Nothing special needs to be done to find bus 0 */
- /* Allow the HT devices to be found */
-
- enumerate_ht_chain();
-
- sio_setup();
-
- /* Setup the mcp55 */
- mcp55_enable_rom();
-
- /* Is this a deliberate reset by the bios */
- if (bios_reset_detected() && last_boot_normal_x) {
- goto normal_image;
- }
- /* This is the primary cpu how should I boot? */
- else if (do_normal_boot()) {
- goto normal_image;
- }
- else {
- goto fallback_image;
- }
- normal_image:
- __asm__ volatile ("jmp __normal_image"
- : /* outputs */
- : "a" (bist), "b"(cpu_init_detectedx) /* inputs */
- );
-
- fallback_image:
- ;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
-void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
- failover_process(bist, cpu_init_detectedx);
-#endif
- real_main(bist, cpu_init_detectedx);
-
-}
//CPU 1 mem is on SMBUS_HUB channel 2, and CPU 2 mem is on channel 1.
#define RC0 (2<<8)
#define RC1 (1<<8)
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
+void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
static const uint16_t spd_addr [] = {
RC0|(0xa<<3)|0, RC0|(0xa<<3)|2, RC0|(0xa<<3)|4, RC0|(0xa<<3)|6,
@@ -233,6 +175,18 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
char *p ;
+ if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+ /* Nothing special needs to be done to find bus 0 */
+ /* Allow the HT devices to be found */
+
+ enumerate_ht_chain();
+
+ sio_setup();
+
+ /* Setup the mcp55 */
+ mcp55_enable_rom();
+ }
+
if (bist == 0) {
//init_cpus(cpu_init_detectedx);
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 23:56:01 +0000