diff options
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r-- | src/mainboard/msi/Kconfig | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms6147/irq_tables.c | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms7135/get_bus_conf.c | 4 | ||||
-rw-r--r-- | src/mainboard/msi/ms7135/irq_tables.c | 12 | ||||
-rw-r--r-- | src/mainboard/msi/ms7260/Kconfig | 12 | ||||
-rw-r--r-- | src/mainboard/msi/ms7260/cmos.layout | 12 | ||||
-rw-r--r-- | src/mainboard/msi/ms7260/resourcemap.c | 12 | ||||
-rw-r--r-- | src/mainboard/msi/ms7260/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms9282/Kconfig | 12 | ||||
-rw-r--r-- | src/mainboard/msi/ms9282/Makefile.inc | 2 | ||||
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/acpi_tables.c | 8 | ||||
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/dsdt.asl | 6 | ||||
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/irq_tables.c | 18 | ||||
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/mb_sysconf.h | 2 |
14 files changed, 53 insertions, 53 deletions
diff --git a/src/mainboard/msi/Kconfig b/src/mainboard/msi/Kconfig index 7377da7f65..fd836987e3 100644 --- a/src/mainboard/msi/Kconfig +++ b/src/mainboard/msi/Kconfig @@ -21,7 +21,7 @@ choice prompt "Mainboard model" depends on VENDOR_MSI - + source "src/mainboard/msi/ms6119/Kconfig" source "src/mainboard/msi/ms6147/Kconfig" source "src/mainboard/msi/ms6156/Kconfig" diff --git a/src/mainboard/msi/ms6147/irq_tables.c b/src/mainboard/msi/ms6147/irq_tables.c index b3cd1194a6..d41e9b7115 100644 --- a/src/mainboard/msi/ms6147/irq_tables.c +++ b/src/mainboard/msi/ms6147/irq_tables.c @@ -35,7 +35,7 @@ const struct irq_routing_table intel_irq_routing_table = { { /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ {0x00,(0x0e<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0}, - {0x00,(0x10<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0}, + {0x00,(0x10<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0}, {0x00,(0x12<<3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0}, {0x00,(0x14<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0}, {0x00,(0x00<<3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* North bridge */ diff --git a/src/mainboard/msi/ms7135/get_bus_conf.c b/src/mainboard/msi/ms7135/get_bus_conf.c index ae7a7f1a03..6ccd97587d 100644 --- a/src/mainboard/msi/ms7135/get_bus_conf.c +++ b/src/mainboard/msi/ms7135/get_bus_conf.c @@ -47,7 +47,7 @@ unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO 0x0000ff0, //no HTIO for ms7135 }; unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most - 0x20202020, //ms7135 has only one ht-chain + 0x20202020, //ms7135 has only one ht-chain }; unsigned bus_type[256]; @@ -100,7 +100,7 @@ void get_bus_conf(void) switch (i) { case 1: dn = 9; break; case 2: dn = 13; break; - case 3: dn = 14; break; + case 3: dn = 14; break; default: dn = -1; break; } dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + dn, 0)); diff --git a/src/mainboard/msi/ms7135/irq_tables.c b/src/mainboard/msi/ms7135/irq_tables.c index f43af44bf5..e4a717ba72 100644 --- a/src/mainboard/msi/ms7135/irq_tables.c +++ b/src/mainboard/msi/ms7135/irq_tables.c @@ -78,7 +78,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) int i; unsigned sbdn; - /* get_bus_conf() will find out all bus num and apic that share with + /* get_bus_conf() will find out all bus num and apic that share with * mptable.c and mptable.c */ get_bus_conf(); @@ -112,7 +112,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq_info = (void *)(&pirq->checksum + 1); slot_num = 0; -//Slot1 PCIE 16x +//Slot1 PCIE 16x write_pirq_info(pirq_info, bus_ck804[1], (0 << 3) | 0, 0x3, 0xdeb8, 0x4, 0xdeb8, 0x1, 0xdeb8, 0x2, 0xdeb8, 4, 0); pirq_info++; @@ -130,7 +130,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq_info++; slot_num++; -//Slot4 PCIE 4x +//Slot4 PCIE 4x write_pirq_info(pirq_info, bus_ck804[4], (0x4 << 3) | 0, 0x2, 0xdeb8, 0x3, 0xdeb8, 0x4, 0xdeb8, 0x1, 0xdeb8, 7, 0); @@ -229,7 +229,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) irq[0] = 10; /* Ethernet */ pci_assign_irqs(bus_ck804[0], 10, irq); - + /* physical slots */ irq[0] = 5; /* PCI E1 - x1 */ @@ -237,7 +237,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) irq[0] = 11; /* PCI E2 - x16 */ pci_assign_irqs(bus_ck804[3], 0, irq); - + /* AGP-on-PCI "AGR" ignored */ irq[0] = 10; /* PCI1 */ @@ -257,7 +257,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) irq[2] = 11; irq[3] = 0; pci_assign_irqs(bus_ck804[1], 9, irq); -#endif +#endif return (unsigned long)pirq_info; } diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig index 9752597d7a..cce07a7f94 100644 --- a/src/mainboard/msi/ms7260/Kconfig +++ b/src/mainboard/msi/ms7260/Kconfig @@ -15,7 +15,7 @@ config BOARD_MSI_MS7260 select LIFT_BSP_APIC_ID select K8_REV_F_SUPPORT select BOARD_ROMSIZE_KB_512 - + config MAINBOARD_DIR string default msi/ms7260 @@ -25,7 +25,7 @@ config DCACHE_RAM_BASE hex default 0xc8000 depends on BOARD_MSI_MS7260 - + config DCACHE_RAM_SIZE hex default 0x08000 @@ -37,7 +37,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE depends on BOARD_MSI_MS7260 config APIC_ID_OFFSET - hex + hex default 0x10 depends on BOARD_MSI_MS7260 @@ -77,7 +77,7 @@ config MAX_PHYSICAL_CPUS depends on BOARD_MSI_MS7260 config HW_MEM_HOLE_SIZE_AUTO_INC - bool + bool default n depends on BOARD_MSI_MS7260 @@ -87,12 +87,12 @@ config HT_CHAIN_UNITID_BASE depends on BOARD_MSI_MS7260 config HT_CHAIN_END_UNITID_BASE - hex + hex default 0x20 depends on BOARD_MSI_MS7260 config SERIAL_CPU_INIT - bool + bool default n depends on BOARD_MSI_MS7260 diff --git a/src/mainboard/msi/ms7260/cmos.layout b/src/mainboard/msi/ms7260/cmos.layout index 51f4a6c598..5266518e56 100644 --- a/src/mainboard/msi/ms7260/cmos.layout +++ b/src/mainboard/msi/ms7260/cmos.layout @@ -1,22 +1,22 @@ -## +## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> -## +## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by ## the Free Software Foundation; either version 2 of the License, or ## (at your option) any later version. -## +## ## This program is distributed in the hope that it will be useful, ## but WITHOUT ANY WARRANTY; without even the implied warranty of ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details. -## +## ## You should have received a copy of the GNU General Public License ## along with this program; if not, write to the Free Software ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## +## # TODO: Check and fix up the values as needed. diff --git a/src/mainboard/msi/ms7260/resourcemap.c b/src/mainboard/msi/ms7260/resourcemap.c index d72530a3ae..a051500c64 100644 --- a/src/mainboard/msi/ms7260/resourcemap.c +++ b/src/mainboard/msi/ms7260/resourcemap.c @@ -163,7 +163,7 @@ static void setup_mb_resource_map(void) * 1 = base/limit registers i are read-only * [ 7: 4] Reserved * [31: 8] Memory-Mapped I/O Base Address i (39-16) - * This field defines the upper address bits of a 40bit address + * This field defines the upper address bits of a 40bit address * that defines the start of memory-mapped I/O region i */ PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000, @@ -201,7 +201,7 @@ static void setup_mb_resource_map(void) * [31:25] Reserved */ // PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000, - PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000, @@ -219,7 +219,7 @@ static void setup_mb_resource_map(void) * [ 3: 2] Reserved * [ 4: 4] VGA Enable * 0 = VGA matches Disabled - * 1 = matches all address < 64K and where A[9:0] is in the + * 1 = matches all address < 64K and where A[9:0] is in the * range 3B0-3BB or 3C0-3DF independen of the base & limit registers * [ 5: 5] ISA Enable * 0 = ISA matches Disabled @@ -227,7 +227,7 @@ static void setup_mb_resource_map(void) * from matching agains this base/limit pair * [11: 6] Reserved * [24:12] PCI I/O Base i - * This field defines the start of PCI I/O region n + * This field defines the start of PCI I/O region n * [31:25] Reserved */ // PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033, @@ -272,9 +272,9 @@ static void setup_mb_resource_map(void) * This field defines the highest bus number in configuration region i */ // PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */ - PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, - PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, + PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, }; diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 3f7b69dc1b..a5fbffbe4b 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -152,7 +152,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) (0xa << 3) | 5, (0xa << 3) | 7, 0, 0, }; - struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); int needs_reset = 0; diff --git a/src/mainboard/msi/ms9282/Kconfig b/src/mainboard/msi/ms9282/Kconfig index bd73487313..cf1896d2d7 100644 --- a/src/mainboard/msi/ms9282/Kconfig +++ b/src/mainboard/msi/ms9282/Kconfig @@ -14,7 +14,7 @@ config BOARD_MSI_MS9282 select HAVE_HARD_RESET select K8_REV_F_SUPPORT select BOARD_ROMSIZE_KB_512 - + config MAINBOARD_DIR string default msi/ms9282 @@ -24,7 +24,7 @@ config DCACHE_RAM_BASE hex default 0xcc000 depends on BOARD_MSI_MS9282 - + config DCACHE_RAM_SIZE hex default 0x04000 @@ -36,7 +36,7 @@ config DCACHE_RAM_GLOBAL_VAR_SIZE depends on BOARD_MSI_MS9282 config APIC_ID_OFFSET - hex + hex default 0x10 depends on BOARD_MSI_MS9282 @@ -71,7 +71,7 @@ config MAX_PHYSICAL_CPUS depends on BOARD_MSI_MS9282 config HW_MEM_HOLE_SIZE_AUTO_INC - bool + bool default n depends on BOARD_MSI_MS9282 @@ -81,12 +81,12 @@ config HT_CHAIN_UNITID_BASE depends on BOARD_MSI_MS9282 config HT_CHAIN_END_UNITID_BASE - hex + hex default 0x20 depends on BOARD_MSI_MS9282 config SERIAL_CPU_INIT - bool + bool default n depends on BOARD_MSI_MS9282 diff --git a/src/mainboard/msi/ms9282/Makefile.inc b/src/mainboard/msi/ms9282/Makefile.inc index 8f94666961..e94ce3fd0e 100644 --- a/src/mainboard/msi/ms9282/Makefile.inc +++ b/src/mainboard/msi/ms9282/Makefile.inc @@ -1,6 +1,6 @@ ## ## This file is part of the coreboot project. -## +## ## Copyright (C) 2007-2008 coresystems GmbH ## ## This program is free software; you can redistribute it and/or modify diff --git a/src/mainboard/msi/ms9652_fam10/acpi_tables.c b/src/mainboard/msi/ms9652_fam10/acpi_tables.c index 54e8be4f67..c76f830d89 100644 --- a/src/mainboard/msi/ms9652_fam10/acpi_tables.c +++ b/src/mainboard/msi/ms9652_fam10/acpi_tables.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Written by Stefan Reinauer <stepan@openbios.org>. - * ACPI FADT, FACS, and DSDT table support added by + * ACPI FADT, FACS, and DSDT table support added by * * Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org> * Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com> @@ -49,7 +49,7 @@ unsigned long acpi_fill_madt(unsigned long current) struct mb_sysconf_t *m; //extern unsigned char bus_mcp55[8]; //extern unsigned apicid_mcp55; - + unsigned sbdn; struct resource *res; device_t dev; @@ -57,7 +57,7 @@ unsigned long acpi_fill_madt(unsigned long current) get_bus_conf(); sbdn = sysconf.sbdn; m = sysconf.mb; - + /* Create all subtables for processors. */ current = acpi_create_madt_lapics(current); @@ -87,7 +87,7 @@ unsigned long acpi_fill_madt(unsigned long current) /* IRQ0 -> APIC IRQ2. */ current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0x0); + current, 0, 0, 2, 0x0); /* Create all subtables for processors. */ current = acpi_create_madt_lapic_nmis(current, diff --git a/src/mainboard/msi/ms9652_fam10/dsdt.asl b/src/mainboard/msi/ms9652_fam10/dsdt.asl index 84e1a76630..e5361b6822 100644 --- a/src/mainboard/msi/ms9652_fam10/dsdt.asl +++ b/src/mainboard/msi/ms9652_fam10/dsdt.asl @@ -51,7 +51,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) External (HCLK) External (SBDN) External (HCDN) - + Method (_CRS, 0, NotSerialized) { Name (BUF0, ResourceTemplate () @@ -272,7 +272,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) Method (_CRS, 0, NotSerialized) { Name (BUF1, ResourceTemplate () { - IO (Decode16, 0x0378, 0x0378, 0x01, 0x08) + IO (Decode16, 0x0378, 0x0378, 0x01, 0x08) IRQNoFlags () {7} }) Return (BUF1) @@ -289,7 +289,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) Method (_CRS, 0, NotSerialized) { Name (BUF1, ResourceTemplate () { - IO (Decode16, 0x0378, 0x0378, 0x01, 0x04) + IO (Decode16, 0x0378, 0x0378, 0x01, 0x04) IO (Decode16, 0x0778, 0x0778, 0x01, 0x04) IRQNoFlags() {7} DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3} diff --git a/src/mainboard/msi/ms9652_fam10/irq_tables.c b/src/mainboard/msi/ms9652_fam10/irq_tables.c index bb14f3310b..a1de4c4f57 100644 --- a/src/mainboard/msi/ms9652_fam10/irq_tables.c +++ b/src/mainboard/msi/ms9652_fam10/irq_tables.c @@ -19,7 +19,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* This file was generated by getpir.c, do not modify! +/* This file was generated by getpir.c, do not modify! * (but if you do, please run checkpir on it to verify) * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up @@ -34,11 +34,11 @@ #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" -static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, +static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, uint8_t slot, uint8_t rfu) { - pirq_info->bus = bus; + pirq_info->bus = bus; pirq_info->devfn = devfn; pirq_info->irq[0].link = link0; pirq_info->irq[0].bitmap = bitmap0; @@ -80,15 +80,15 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq = (void *)(addr); v = (uint8_t *)(addr); - + pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - + pirq->rtr_bus = m->bus_mcp55[0]; pirq->rtr_devfn = ((sbdn+6)<<3)|0; pirq->exclusive_irqs = 0; - + pirq->rtr_vendor = 0x10de; pirq->rtr_device = 0x0370; @@ -101,7 +101,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) //pci bridge write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; slot_num++; - + for(i=1; i< sysconf.hc_possible_num; i++) { if(!(sysconf.pci1234[i] & 0x1) ) continue; unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff; @@ -120,10 +120,10 @@ unsigned long write_pirq_routing_table(unsigned long addr) } #endif - pirq->size = 32 + 16 * slot_num; + pirq->size = 32 + 16 * slot_num; for (i = 0; i < pirq->size; i++) - sum += v[i]; + sum += v[i]; sum = pirq->checksum - sum; diff --git a/src/mainboard/msi/ms9652_fam10/mb_sysconf.h b/src/mainboard/msi/ms9652_fam10/mb_sysconf.h index 83f9dbab28..a2e6fc7ade 100644 --- a/src/mainboard/msi/ms9652_fam10/mb_sysconf.h +++ b/src/mainboard/msi/ms9652_fam10/mb_sysconf.h @@ -26,7 +26,7 @@ struct mb_sysconf_t { unsigned char bus_isa; unsigned char bus_mcp55[8]; //1 unsigned apicid_mcp55; - unsigned bus_type[256]; + unsigned bus_type[256]; }; |