diff options
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r-- | src/mainboard/msi/ms7260/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/msi/ms7260/romstage.c | 8 | ||||
-rw-r--r-- | src/mainboard/msi/ms9185/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/msi/ms9185/romstage.c | 7 | ||||
-rw-r--r-- | src/mainboard/msi/ms9282/romstage.c | 6 | ||||
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/romstage.c | 5 |
6 files changed, 5 insertions, 23 deletions
diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig index bd9bbe072b..4cfcc1749b 100644 --- a/src/mainboard/msi/ms7260/Kconfig +++ b/src/mainboard/msi/ms7260/Kconfig @@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT select K8_ALLOCATE_IO_RANGE + select SET_FIDVID config MAINBOARD_DIR string diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 9804518c0d..210ea4f8fe 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -28,12 +28,6 @@ #define SET_NB_CFG_54 1 #endif -/* Used by init_cpus and fidvid. */ -#define SET_FIDVID 1 - -/* If we want to wait for core1 done before DQS training, set it to 0. */ -#define SET_FIDVID_CORE0_ONLY 1 - #if CONFIG_K8_REV_F_SUPPORT == 1 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif @@ -201,7 +195,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Set up chains and store link pair for optimization later. */ ht_setup_chains_x(sysinfo); /* Init sblnk and sbbusn, nodes, sbdn. */ -#if SET_FIDVID == 1 +#if CONFIG_SET_FIDVID { msr_t msr = rdmsr(0xc0010042); print_debug("begin msr fid, vid "); diff --git a/src/mainboard/msi/ms9185/Kconfig b/src/mainboard/msi/ms9185/Kconfig index ebae5d137e..2d3041ca22 100644 --- a/src/mainboard/msi/ms9185/Kconfig +++ b/src/mainboard/msi/ms9185/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select RAMINIT_SYSINFO select SB_HT_CHAIN_UNITID_OFFSET_ONLY select QRANK_DIMM_SUPPORT + select SET_FIDVID config MAINBOARD_DIR string diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index bc6ead6a75..599a01a37e 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -25,11 +25,6 @@ #define SET_NB_CFG_54 1 -//used by init_cpus and fidvid -#define SET_FIDVID 1 -//if we want to wait for core1 done before DQS training, set it to 0 -#define SET_FIDVID_CORE0_ONLY 1 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -201,7 +196,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= optimize_link_incoherent_ht(sysinfo); #endif -#if SET_FIDVID == 1 +#if CONFIG_SET_FIDVID { msr_t msr; diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 942fb11989..6f24bdccfc 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -24,12 +24,6 @@ #define SET_NB_CFG_54 1 -// used by init_cpus and fidvid (disabled until someone tests this) -// #define SET_FIDVID 1 -#define SET_FIDVID 0 -// if we want to wait for core1 done before DQS training, set it to 0 -// #define SET_FIDVID_CORE0_ONLY 1 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 5ad0719fa7..18618589c7 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -27,9 +27,6 @@ #define SET_NB_CFG_54 1 #endif -#define SET_FIDVID 1 -#define SET_FIDVID_CORE_RANGE 0 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -224,7 +221,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x38); -#if SET_FIDVID == 1 +#if CONFIG_SET_FIDVID msr = rdmsr(0xc0010071); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); |