summaryrefslogtreecommitdiff
path: root/src/mainboard/msi/ms9652_fam10
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/msi/ms9652_fam10')
-rw-r--r--src/mainboard/msi/ms9652_fam10/get_bus_conf.c2
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
index 8c7f921041..74b14b42c8 100644
--- a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
+++ b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
@@ -69,7 +69,7 @@ void get_bus_conf(void)
}
/*I/O APICs: APIC ID Version State Address*/
- if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) {
+ if (CONFIG(LOGICAL_CPUS)) {
apicid_base = get_apicid_base(1);
printk(BIOS_SPEW, "CONFIG_LOGICAL_CPUS == 1: apicid_base: %08x\n", apicid_base);
} else {
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index ab9b0a4594..11015f6a67 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -175,7 +175,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
*/
wait_all_core0_started();
-#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
+#if CONFIG(LOGICAL_CPUS)
/* Core0 on each node is configured. Now setup any additional cores. */
printk(BIOS_DEBUG, "start_other_cores()\n");
start_other_cores(bsp_apicid);
@@ -186,7 +186,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x38);
-#if IS_ENABLED(CONFIG_SET_FIDVID)
+#if CONFIG(SET_FIDVID)
msr = rdmsr(MSR_COFVID_STS);
printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo);