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Diffstat (limited to 'src/mainboard/msi/ms9185/romstage.c')
-rw-r--r--src/mainboard/msi/ms9185/romstage.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c
index e7fb87227f..2a4564c608 100644
--- a/src/mainboard/msi/ms9185/romstage.c
+++ b/src/mainboard/msi/ms9185/romstage.c
@@ -35,9 +35,9 @@
//#define K8_ALLOCATE_IO_RANGE 1
//used by init_cpus and fidvid
-#define K8_SET_FIDVID 1
+#define SET_FIDVID 1
//if we want to wait for core1 done before DQS training, set it to 0
-#define K8_SET_FIDVID_CORE0_ONLY 1
+#define SET_FIDVID_CORE0_ONLY 1
#include <stdint.h>
#include <string.h>
@@ -221,7 +221,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= optimize_link_incoherent_ht(sysinfo);
#endif
-#if K8_SET_FIDVID == 1
+#if SET_FIDVID == 1
{
msr_t msr;