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-rw-r--r--src/mainboard/lippert/roadrunner-lx/Config.lb5
-rw-r--r--src/mainboard/lippert/spacerunner-lx/Config.lb4
2 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/lippert/roadrunner-lx/Config.lb b/src/mainboard/lippert/roadrunner-lx/Config.lb
index 19dd58e091..182b482118 100644
--- a/src/mainboard/lippert/roadrunner-lx/Config.lb
+++ b/src/mainboard/lippert/roadrunner-lx/Config.lb
@@ -72,7 +72,6 @@ if HAVE_PIRQ_TABLE
object irq_tables.o
end
-if USE_DCACHE_RAM
# compile cache_as_ram.c to auto.inc
makerule ./cache_as_ram_auto.inc
depends "$(MAINBOARD)/cache_as_ram_auto.c"
@@ -80,8 +79,6 @@ if USE_DCACHE_RAM
action "perl -e 's/.rodata/.rom.data/g' -pi $@"
action "perl -e 's/.text/.section .rom.text/g' -pi $@"
end
-end
-
##
## Build our 16 bit and 32 bit coreboot entry code
@@ -130,10 +127,8 @@ end
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
-if USE_DCACHE_RAM
mainboardinit cpu/amd/model_lx/cache_as_ram.inc
mainboardinit ./cache_as_ram_auto.inc
-end
##
## Include the secondary configuration files
diff --git a/src/mainboard/lippert/spacerunner-lx/Config.lb b/src/mainboard/lippert/spacerunner-lx/Config.lb
index 3e455f1470..243693de25 100644
--- a/src/mainboard/lippert/spacerunner-lx/Config.lb
+++ b/src/mainboard/lippert/spacerunner-lx/Config.lb
@@ -70,7 +70,6 @@ if HAVE_PIRQ_TABLE
object irq_tables.o
end
-if USE_DCACHE_RAM
# compile cache_as_ram.c to auto.inc
makerule ./cache_as_ram_auto.inc
depends "$(MAINBOARD)/cache_as_ram_auto.c"
@@ -78,7 +77,6 @@ if USE_DCACHE_RAM
action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
end
-end
##
## Build our 16 bit and 32 bit coreboot entry code
@@ -127,10 +125,8 @@ end
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
-if USE_DCACHE_RAM
mainboardinit cpu/amd/model_lx/cache_as_ram.inc
mainboardinit ./cache_as_ram_auto.inc
-end
##
## Include the secondary configuration files