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-rw-r--r--src/mainboard/lippert/hurricane-lx/romstage.c16
-rw-r--r--src/mainboard/lippert/literunner-lx/romstage.c16
-rw-r--r--src/mainboard/lippert/roadrunner-lx/romstage.c16
-rw-r--r--src/mainboard/lippert/spacerunner-lx/romstage.c16
4 files changed, 32 insertions, 32 deletions
diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c
index 95ea27dad2..063721b059 100644
--- a/src/mainboard/lippert/hurricane-lx/romstage.c
+++ b/src/mainboard/lippert/hurricane-lx/romstage.c
@@ -35,9 +35,13 @@
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
-#include "superio/ite/it8712f/early_serial.c"
+#include <superio/ite/common/ite.h>
+#include <superio/ite/it8712f/it8712f.h>
#include "northbridge/amd/lx/raminit.h"
+#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+
/* Bit0 enables Spread Spectrum. */
#define SMC_CONFIG 0x01
@@ -77,7 +81,6 @@ static int smc_send_config(unsigned char config_data)
#include "cpu/amd/geode_lx/msrinit.c"
static const u16 sio_init_table[] = { // hi=data, lo=index
- 0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...)
0x042C, // disable ATXPG; VIN6 enabled, FAN4/5 disabled, VIN7,VIN3 enabled
0x1423, // don't delay PoWeROK1/2
0x9072, // watchdog triggers PWROK, counts seconds
@@ -101,13 +104,10 @@ static void mb_gpio_init(void)
int i;
/* Init Super I/O WDT, GPIOs. Done early, WDT init may trigger reset! */
- it8712f_enter_conf();
for (i = 0; i < ARRAY_SIZE(sio_init_table); i++) {
- u16 val = sio_init_table[i];
- outb((u8)val, SIO_INDEX);
- outb(val >> 8, SIO_DATA);
+ u16 reg = sio_init_table[i];
+ ite_reg_write(GPIO_DEV, (u8) reg, (reg >> 8));
}
- it8712f_exit_conf();
}
void main(unsigned long bist)
@@ -126,7 +126,7 @@ void main(unsigned long bist)
* Note: Must do this AFTER the early_setup! It is counting on some
* early MSR setup for CS5536.
*/
- it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
mb_gpio_init();
console_init();
diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c
index 6edcf373dd..174620a8ac 100644
--- a/src/mainboard/lippert/literunner-lx/romstage.c
+++ b/src/mainboard/lippert/literunner-lx/romstage.c
@@ -35,9 +35,13 @@
#include "southbridge/amd/cs5536/cs5536.h"
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
-#include "superio/ite/it8712f/early_serial.c"
+#include <superio/ite/common/ite.h>
+#include <superio/ite/it8712f/it8712f.h>
#include "northbridge/amd/lx/raminit.h"
+#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+
/* Bit0 enables Spread Spectrum, bit1 makes on-board CF slot act as IDE slave. */
#if CONFIG_ONBOARD_IDE_SLAVE
#define SMC_CONFIG 0x03
@@ -118,7 +122,6 @@ static int smc_send_config(unsigned char config_data)
#include "cpu/amd/geode_lx/msrinit.c"
static const u16 sio_init_table[] = { // hi=data, lo=index
- 0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...)
0x072C, // VIN6 enabled, FAN4/5 disabled, VIN7,VIN3 internal
0x1423, // don't delay PoWeROK1/2
0x9072, // watchdog triggers PWROK, counts seconds
@@ -143,13 +146,10 @@ static void mb_gpio_init(void)
int i;
/* Init Super I/O WDT, GPIOs. Done early, WDT init may trigger reset! */
- it8712f_enter_conf();
for (i = 0; i < ARRAY_SIZE(sio_init_table); i++) {
- u16 val = sio_init_table[i];
- outb((u8)val, SIO_INDEX);
- outb(val >> 8, SIO_DATA);
+ u16 reg = sio_init_table[i];
+ ite_reg_write(GPIO_DEV, (u8) reg, (reg >> 8));
}
- it8712f_exit_conf();
}
void main(unsigned long bist)
@@ -169,7 +169,7 @@ void main(unsigned long bist)
* Note: Must do this AFTER the early_setup! It is counting on some
* early MSR setup for CS5536.
*/
- it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
mb_gpio_init();
console_init();
diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
index 68dcfc0ff1..2642373efd 100644
--- a/src/mainboard/lippert/roadrunner-lx/romstage.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -35,9 +35,13 @@
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
-#include "superio/ite/it8712f/early_serial.c"
+#include <superio/ite/common/ite.h>
+#include <superio/ite/it8712f/it8712f.h>
#include "northbridge/amd/lx/raminit.h"
+#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+
int spd_read_byte(unsigned int device, unsigned int address)
{
if (device != DIMM0)
@@ -53,7 +57,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/msrinit.c"
static const u16 sio_init_table[] = { // hi=data, lo=index
- 0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...)
0x1E2C, // disable ATXPG; VIN6,FAN4/5,VIN3 enabled, VIN7 internal
0x1423, // don't delay PoWeROK1/2 - triggers 2nd reset
0x9072, // watchdog triggers PWROK, counts seconds
@@ -76,13 +79,10 @@ static void mb_gpio_init(void)
int i;
/* Init Super I/O WDT, GPIOs. Done early, WDT init may trigger reset! */
- it8712f_enter_conf();
for (i = 0; i < ARRAY_SIZE(sio_init_table); i++) {
- u16 val = sio_init_table[i];
- outb((u8)val, SIO_INDEX);
- outb(val >> 8, SIO_DATA);
+ u16 reg = sio_init_table[i];
+ ite_reg_write(GPIO_DEV, (u8) reg, (reg >> 8));
}
- it8712f_exit_conf();
}
void main(unsigned long bist)
@@ -101,7 +101,7 @@ void main(unsigned long bist)
* Note: must do this AFTER the early_setup! It is counting on some
* early MSR setup for CS5536.
*/
- it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
mb_gpio_init();
console_init();
diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index 59bd618eb1..9d5539e2bb 100644
--- a/src/mainboard/lippert/spacerunner-lx/romstage.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -35,9 +35,13 @@
#include "southbridge/amd/cs5536/cs5536.h"
#include "southbridge/amd/cs5536/early_smbus.c"
#include "southbridge/amd/cs5536/early_setup.c"
-#include "superio/ite/it8712f/early_serial.c"
+#include <superio/ite/common/ite.h>
+#include <superio/ite/it8712f/it8712f.h>
#include "northbridge/amd/lx/raminit.h"
+#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
+#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
+
/* Bit0 enables Spread Spectrum, bit1 makes on-board SSD act as IDE slave. */
#if CONFIG_ONBOARD_IDE_SLAVE
#define SMC_CONFIG 0x03
@@ -118,7 +122,6 @@ static int smc_send_config(unsigned char config_data)
#include "cpu/amd/geode_lx/msrinit.c"
static const u16 sio_init_table[] = { // hi=data, lo=index
- 0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...)
0x072C, // VIN6 enabled, FAN4/5 disabled, VIN7,VIN3 internal
0x1423, // don't delay PoWeROK1/2
0x9072, // watchdog triggers PWROK, counts seconds
@@ -140,13 +143,10 @@ static void mb_gpio_init(void)
int i;
/* Init Super I/O WDT, GPIOs. Done early, WDT init may trigger reset! */
- it8712f_enter_conf();
for (i = 0; i < ARRAY_SIZE(sio_init_table); i++) {
- u16 val = sio_init_table[i];
- outb((u8)val, SIO_INDEX);
- outb(val >> 8, SIO_DATA);
+ u16 reg = sio_init_table[i];
+ ite_reg_write(GPIO_DEV, (u8) reg, (reg >> 8));
}
- it8712f_exit_conf();
}
void main(unsigned long bist)
@@ -166,7 +166,7 @@ void main(unsigned long bist)
* Note: Must do this AFTER the early_setup! It is counting on some
* early MSR setup for CS5536.
*/
- it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
mb_gpio_init();
console_init();
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 22:45:58 +0000