diff options
Diffstat (limited to 'src/mainboard/lippert')
-rw-r--r-- | src/mainboard/lippert/frontrunner/romstage.c | 7 | ||||
-rw-r--r-- | src/mainboard/lippert/roadrunner-lx/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/lippert/spacerunner-lx/romstage.c | 4 |
3 files changed, 3 insertions, 12 deletions
diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c index 1ea608f735..c5ed73aec6 100644 --- a/src/mainboard/lippert/frontrunner/romstage.c +++ b/src/mainboard/lippert/frontrunner/romstage.c @@ -1,6 +1,3 @@ -#define ASSEMBLY 1 - - #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> @@ -70,12 +67,10 @@ static void msr_init(void) __builtin_wrmsr(0x40000029, 0x7bf00100, 0x2000000f); __builtin_wrmsr(0x4000002d, 0xff030003, 0x20000000); - __builtin_wrmsr(0x50002001, 0x27, 0x0); __builtin_wrmsr(0x4c002001, 0x1, 0x0); } - static void main(unsigned long bist) { static const struct mem_controller memctrl [] = { @@ -104,7 +99,6 @@ static void main(unsigned long bist) outb( 0x87, 0x4E); //enter SuperIO configuration mode outb( 0x87, 0x4E); - outb(0x20, 0x4e); temp = inb(0x4f); print_debug_hex8(temp); @@ -134,3 +128,4 @@ static void main(unsigned long bist) // ram_check(0x00000000, 640*1024); } + diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index c288fc3342..3884d28c86 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -21,9 +21,6 @@ /* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */ -#define ASSEMBLY 1 - - #include <stdlib.h> #include <stdint.h> #include <device/pci_def.h> @@ -167,3 +164,4 @@ void cache_as_ram_main(void) /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; } + diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 692c5a75e0..e92cf7adc7 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -21,9 +21,6 @@ /* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */ -#define ASSEMBLY 1 - - #include <stdlib.h> #include <stdint.h> #include <spd.h> @@ -236,3 +233,4 @@ void cache_as_ram_main(void) /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ return; } + |