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-rw-r--r--src/mainboard/libretrend/lt1000/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb
index 9fedde5db8..5e5c9beddf 100644
--- a/src/mainboard/libretrend/lt1000/devicetree.cb
+++ b/src/mainboard/libretrend/lt1000/devicetree.cb
@@ -28,7 +28,6 @@ chip soc/intel/skylake
register "gen1_dec" = "0x007c0a01" # EC 0xa00-0xa7f
register "gen2_dec" = "0x000c03e1" # COM3 port 0x3e0 - 0x3ef
register "gen3_dec" = "0x00fc02e1" # COM2/4/5/6 ports 0x2e0 - 0x2ff
- register "gen4_dec" = "0x000c0081" # 0x80 - 0x8f
# Disable DPTF
register "dptf_enable" = "0"