diff options
Diffstat (limited to 'src/mainboard/lenovo/x220/variants')
-rw-r--r-- | src/mainboard/lenovo/x220/variants/x1/gpio.c | 16 | ||||
-rw-r--r-- | src/mainboard/lenovo/x220/variants/x1/romstage.c | 15 | ||||
-rw-r--r-- | src/mainboard/lenovo/x220/variants/x220/gpio.c | 14 | ||||
-rw-r--r-- | src/mainboard/lenovo/x220/variants/x220/romstage.c | 15 |
4 files changed, 8 insertions, 52 deletions
diff --git a/src/mainboard/lenovo/x220/variants/x1/gpio.c b/src/mainboard/lenovo/x220/variants/x1/gpio.c index cd68e8c5cf..c1cff882dd 100644 --- a/src/mainboard/lenovo/x220/variants/x1/gpio.c +++ b/src/mainboard/lenovo/x220/variants/x1/gpio.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ #include <southbridge/intel/common/gpio.h> diff --git a/src/mainboard/lenovo/x220/variants/x1/romstage.c b/src/mainboard/lenovo/x220/variants/x1/romstage.c index 41757b26b7..b935458ae2 100644 --- a/src/mainboard/lenovo/x220/variants/x1/romstage.c +++ b/src/mainboard/lenovo/x220/variants/x1/romstage.c @@ -1,16 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/mainboard/lenovo/x220/variants/x220/gpio.c b/src/mainboard/lenovo/x220/variants/x220/gpio.c index b1499d1f83..7416f4db74 100644 --- a/src/mainboard/lenovo/x220/variants/x220/gpio.c +++ b/src/mainboard/lenovo/x220/variants/x220/gpio.c @@ -1,15 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ #include <southbridge/intel/common/gpio.h> static const struct pch_gpio_set1 pch_gpio_set1_mode = { diff --git a/src/mainboard/lenovo/x220/variants/x220/romstage.c b/src/mainboard/lenovo/x220/variants/x220/romstage.c index 2b68275ed6..3d7a410feb 100644 --- a/src/mainboard/lenovo/x220/variants/x220/romstage.c +++ b/src/mainboard/lenovo/x220/variants/x220/romstage.c @@ -1,16 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ #include <southbridge/intel/bd82x6x/pch.h> |