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-rw-r--r--src/mainboard/lenovo/x200/romstage.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c
index 2cd1b213b0..a0a1ace16e 100644
--- a/src/mainboard/lenovo/x200/romstage.c
+++ b/src/mainboard/lenovo/x200/romstage.c
@@ -29,12 +29,10 @@
#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <northbridge/intel/gm45/gm45.h>
-#include <timestamp.h>
#define LPC_DEV PCI_DEV(0, 0x1f, 0)
#define MCH_DEV PCI_DEV(0, 0, 0)
-
static void early_lpc_setup(void)
{
/* Set up SuperIO LPC forwards */
@@ -56,9 +54,6 @@ void mainboard_romstage_entry(unsigned long bist)
int cbmem_initted;
u16 reg16;
- timestamp_init(get_initial_timestamp());
- timestamp_add_now(TS_START_ROMSTAGE);
-
/* basic northbridge setup, including MMCONF BAR */
gm45_early_init();