diff options
Diffstat (limited to 'src/mainboard/lenovo/thinkcentre_a58/acpi')
4 files changed, 79 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi/ec.asl b/src/mainboard/lenovo/thinkcentre_a58/acpi/ec.asl new file mode 100644 index 0000000000..2997587d82 --- /dev/null +++ b/src/mainboard/lenovo/thinkcentre_a58/acpi/ec.asl @@ -0,0 +1 @@ +/* dummy */ diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi/ich7_pci_irqs.asl b/src/mainboard/lenovo/thinkcentre_a58/acpi/ich7_pci_irqs.asl new file mode 100644 index 0000000000..4540ce814d --- /dev/null +++ b/src/mainboard/lenovo/thinkcentre_a58/acpi/ich7_pci_irqs.asl @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This is board specific information: + * IRQ routing for the 0:1e.0 PCI bridge of the ICH7 + */ + +If (PICM) { + Return (Package() { + Package() { 0x0004ffff, 0, 0, 0x14}, + Package() { 0x0004ffff, 1, 0, 0x15}, + Package() { 0x0004ffff, 2, 0, 0x16}, + Package() { 0x0004ffff, 3, 0, 0x17}, + + Package() { 0x0008ffff, 0, 0, 0x14}, + + Package() { 0x000affff, 0, 0, 0x15}, + Package() { 0x000affff, 1, 0, 0x16}, + Package() { 0x000affff, 2, 0, 0x17}, + Package() { 0x000affff, 3, 0, 0x14}, + }) +} Else { + Return (Package() { + Package() { 0x0004ffff, 0, \_SB.PCI0.LPCB.LNKE, 0}, + Package() { 0x0004ffff, 1, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0004ffff, 2, \_SB.PCI0.LPCB.LNKG, 0}, + Package() { 0x0004ffff, 3, \_SB.PCI0.LPCB.LNKH, 0}, + + Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0}, + + Package() { 0x0004ffff, 0, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0004ffff, 1, \_SB.PCI0.LPCB.LNKG, 0}, + Package() { 0x0004ffff, 2, \_SB.PCI0.LPCB.LNKH, 0}, + Package() { 0x0004ffff, 3, \_SB.PCI0.LPCB.LNKE, 0}, + }) +} diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi/platform.asl b/src/mainboard/lenovo/thinkcentre_a58/acpi/platform.asl new file mode 100644 index 0000000000..6c92a4ed47 --- /dev/null +++ b/src/mainboard/lenovo/thinkcentre_a58/acpi/platform.asl @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Method(_PIC, 1) +{ + /* Remember the OS' IRQ routing choice. */ + Store(Arg0, PICM) +} + +/* SMI I/O Trap */ +Method(TRAP, 1, Serialized) +{ + Store (Arg0, SMIF) /* SMI Function */ + Store (0, TRP0) /* Generate trap */ + Return (SMIF) /* Return value of SMI handler */ +} diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi/superio.asl b/src/mainboard/lenovo/thinkcentre_a58/acpi/superio.asl new file mode 100644 index 0000000000..8f414f586f --- /dev/null +++ b/src/mainboard/lenovo/thinkcentre_a58/acpi/superio.asl @@ -0,0 +1 @@ +/* TODO */ |