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Diffstat (limited to 'src/mainboard/lenovo/t520/devicetree.cb')
-rw-r--r-- | src/mainboard/lenovo/t520/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index c32e237095..d347e8246d 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -73,6 +73,9 @@ chip northbridge/intel/sandybridge # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "1" + register "c2_latency" = "101" # c2 not supported + register "p_cnt_throttling_supported" = "1" + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end device pci 16.2 off end |