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Diffstat (limited to 'src/mainboard/lenovo/t440p/romstage.c')
-rw-r--r--src/mainboard/lenovo/t440p/romstage.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c
index c8c630bfde..283a52b460 100644
--- a/src/mainboard/lenovo/t440p/romstage.c
+++ b/src/mainboard/lenovo/t440p/romstage.c
@@ -22,6 +22,9 @@
#include <northbridge/intel/haswell/pei_data.h>
#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/lynxpoint/pch.h>
+#include <option.h>
+#include <ec/lenovo/pmh7/pmh7.h>
+#include <device/pci_ops.h>
static const struct rcba_config_instruction rcba_config[] = {
RCBA_SET_REG_16(D31IR, DIR_ROUTE(PIRQA, PIRQD, PIRQC, PIRQA)),
@@ -100,4 +103,21 @@ void mainboard_romstage_entry(void)
};
romstage_common(&romstage_params);
+
+ u8 enable_peg;
+ if (get_option(&enable_peg, "enable_dual_graphics") != CB_SUCCESS)
+ enable_peg = 0;
+
+ bool power_en = pmh7_dgpu_power_state();
+
+ if (enable_peg != power_en)
+ pmh7_dgpu_power_enable(!power_en);
+
+ if (!enable_peg) {
+ // Hide disabled dGPU device
+ u32 reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN);
+ reg32 &= ~DEVEN_D1F0EN;
+
+ pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32);
+ }
}